winsys/amdgpu: use int16 for buffer_indices_hashlist
int16 allows to correctly store the indices of 32k buffers; this seems sufficient and is twice smaller than regular int. Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11010>
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@ -444,7 +444,7 @@ static int amdgpu_lookup_buffer(struct amdgpu_cs_context *cs, struct amdgpu_wins
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* AAAAAAAAAAABBBBBBBBBBBBBBCCCCCCCC
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* AAAAAAAAAAABBBBBBBBBBBBBBCCCCCCCC
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* will collide here: ^ and here: ^,
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* will collide here: ^ and here: ^,
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* meaning that we should get very few collisions in the end. */
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* meaning that we should get very few collisions in the end. */
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cs->buffer_indices_hashlist[hash] = i;
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cs->buffer_indices_hashlist[hash] = i & 0x7fff;
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return i;
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return i;
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}
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}
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}
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}
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@ -523,7 +523,7 @@ amdgpu_lookup_or_add_real_buffer(struct radeon_cmdbuf *rcs, struct amdgpu_cs *ac
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idx = amdgpu_do_add_real_buffer(acs->ws, cs, bo);
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idx = amdgpu_do_add_real_buffer(acs->ws, cs, bo);
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hash = bo->unique_id & (BUFFER_HASHLIST_SIZE-1);
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hash = bo->unique_id & (BUFFER_HASHLIST_SIZE-1);
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cs->buffer_indices_hashlist[hash] = idx;
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cs->buffer_indices_hashlist[hash] = idx & 0x7fff;
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if (bo->base.placement & RADEON_DOMAIN_VRAM)
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if (bo->base.placement & RADEON_DOMAIN_VRAM)
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rcs->used_vram_kb += bo->base.size / 1024;
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rcs->used_vram_kb += bo->base.size / 1024;
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@ -578,7 +578,7 @@ static int amdgpu_lookup_or_add_slab_buffer(struct amdgpu_winsys *ws,
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cs->num_slab_buffers++;
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cs->num_slab_buffers++;
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hash = bo->unique_id & (BUFFER_HASHLIST_SIZE-1);
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hash = bo->unique_id & (BUFFER_HASHLIST_SIZE-1);
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cs->buffer_indices_hashlist[hash] = idx;
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cs->buffer_indices_hashlist[hash] = idx & 0x7fff;
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return idx;
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return idx;
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}
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}
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@ -622,7 +622,7 @@ static int amdgpu_lookup_or_add_sparse_buffer(struct amdgpu_winsys *ws,
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cs->num_sparse_buffers++;
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cs->num_sparse_buffers++;
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hash = bo->unique_id & (BUFFER_HASHLIST_SIZE-1);
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hash = bo->unique_id & (BUFFER_HASHLIST_SIZE-1);
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cs->buffer_indices_hashlist[hash] = idx;
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cs->buffer_indices_hashlist[hash] = idx & 0x7fff;
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/* We delay adding the backing buffers until we really have to. However,
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/* We delay adding the backing buffers until we really have to. However,
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* we cannot delay accounting for memory use.
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* we cannot delay accounting for memory use.
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@ -104,7 +104,7 @@ struct amdgpu_cs_context {
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unsigned max_sparse_buffers;
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unsigned max_sparse_buffers;
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struct amdgpu_cs_buffer *sparse_buffers;
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struct amdgpu_cs_buffer *sparse_buffers;
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int *buffer_indices_hashlist;
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int16_t *buffer_indices_hashlist;
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struct amdgpu_winsys_bo *last_added_bo;
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struct amdgpu_winsys_bo *last_added_bo;
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unsigned last_added_bo_index;
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unsigned last_added_bo_index;
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@ -147,8 +147,13 @@ struct amdgpu_cs {
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struct amdgpu_cs_context *csc;
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struct amdgpu_cs_context *csc;
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/* The CS being currently-owned by the other thread. */
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/* The CS being currently-owned by the other thread. */
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struct amdgpu_cs_context *cst;
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struct amdgpu_cs_context *cst;
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/* This is only used by csc, not cst */
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/* buffer_indices_hashlist[hash(bo)] returns -1 if the bo
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int buffer_indices_hashlist[BUFFER_HASHLIST_SIZE];
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* isn't part of any buffer lists or the index where the bo could be found.
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* Since 1) hash collisions of 2 different bo can happen and 2) we use a
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* single hashlist for the 3 buffer list, this is only a hint.
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* amdgpu_lookup_buffer uses this hint to speed up buffers look up.
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*/
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int16_t buffer_indices_hashlist[BUFFER_HASHLIST_SIZE];
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/* Flush CS. */
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/* Flush CS. */
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void (*flush_cs)(void *ctx, unsigned flags, struct pipe_fence_handle **fence);
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void (*flush_cs)(void *ctx, unsigned flags, struct pipe_fence_handle **fence);
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