gallium: add new opcodes for ARB_gs5 bit manipulation support
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Roland Scheidegger <sroland@vmware.com>
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@ -223,6 +223,14 @@ static const struct tgsi_opcode_info opcode_info[TGSI_OPCODE_LAST] =
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{ 1, 2, 0, 0, 0, 0, COMP, "UMUL_HI", TGSI_OPCODE_UMUL_HI },
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{ 1, 2, 0, 0, 0, 0, COMP, "UMUL_HI", TGSI_OPCODE_UMUL_HI },
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{ 1, 3, 1, 0, 0, 0, OTHR, "TG4", TGSI_OPCODE_TG4 },
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{ 1, 3, 1, 0, 0, 0, OTHR, "TG4", TGSI_OPCODE_TG4 },
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{ 1, 2, 1, 0, 0, 0, OTHR, "LODQ", TGSI_OPCODE_LODQ },
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{ 1, 2, 1, 0, 0, 0, OTHR, "LODQ", TGSI_OPCODE_LODQ },
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{ 1, 3, 0, 0, 0, 0, COMP, "IBFE", TGSI_OPCODE_IBFE },
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{ 1, 3, 0, 0, 0, 0, COMP, "UBFE", TGSI_OPCODE_UBFE },
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{ 1, 4, 0, 0, 0, 0, COMP, "BFI", TGSI_OPCODE_BFI },
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{ 1, 1, 0, 0, 0, 0, COMP, "BREV", TGSI_OPCODE_BREV },
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{ 1, 1, 0, 0, 0, 0, COMP, "POPC", TGSI_OPCODE_POPC },
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{ 1, 1, 0, 0, 0, 0, COMP, "LSB", TGSI_OPCODE_LSB },
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{ 1, 1, 0, 0, 0, 0, COMP, "IMSB", TGSI_OPCODE_IMSB },
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{ 1, 1, 0, 0, 0, 0, COMP, "UMSB", TGSI_OPCODE_UMSB },
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};
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};
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const struct tgsi_opcode_info *
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const struct tgsi_opcode_info *
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@ -1558,6 +1558,81 @@ Support for these opcodes indicated by PIPE_SHADER_CAP_INTEGERS (all of them?)
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dst.w = |src.w|
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dst.w = |src.w|
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Bitwise ISA
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^^^^^^^^^^^
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These opcodes are used for bit-level manipulation of integers.
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.. opcode:: IBFE - Signed Bitfield Extract
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See SM5 instruction of the same name. Extracts a set of bits from the input,
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and sign-extends them if the high bit of the extracted window is set.
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Pseudocode::
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def ibfe(value, offset, bits):
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offset = offset & 0x1f
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bits = bits & 0x1f
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if bits == 0: return 0
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# Note: >> sign-extends
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if width + offset < 32:
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return (value << (32 - offset - bits)) >> (32 - bits)
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else:
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return value >> offset
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.. opcode:: UBFE - Unsigned Bitfield Extract
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See SM5 instruction of the same name. Extracts a set of bits from the input,
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without any sign-extension.
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Pseudocode::
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def ubfe(value, offset, bits):
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offset = offset & 0x1f
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bits = bits & 0x1f
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if bits == 0: return 0
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# Note: >> does not sign-extend
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if width + offset < 32:
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return (value << (32 - offset - bits)) >> (32 - bits)
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else:
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return value >> offset
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.. opcode:: BFI - Bitfield Insert
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See SM5 instruction of the same name. Replaces a bit region of 'base' with
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the low bits of 'insert'.
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Pseudocode::
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def bfi(base, insert, offset, bits):
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offset = offset & 0x1f
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bits = bits & 0x1f
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mask = ((1 << bits) - 1) << offset
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return ((insert << offset) & mask) | (base & ~mask)
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.. opcode:: BREV - Bitfield Reverse
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See SM5 instruction BFREV. Reverses the bits of the argument.
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.. opcode:: POPC - Population Count
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See SM5 instruction COUNTBITS. Counts the number of set bits in the argument.
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.. opcode:: LSB - Index of lowest set bit
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See SM5 instruction FIRSTBIT_LO. Computes the 0-based index of the first set
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bit of the argument. Returns -1 if none are set.
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.. opcode:: IMSB - Index of highest non-sign bit
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See SM5 instruction FIRSTBIT_SHI. Computes the 0-based index of the highest
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non-sign bit of the argument (i.e. highest 0 bit for negative numbers,
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highest 1 bit for positive numbers). Returns -1 if all bits are the same
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(i.e. for inputs 0 and -1).
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.. opcode:: UMSB - Index of highest set bit
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See SM5 instruction FIRSTBIT_HI. Computes the 0-based index of the highest
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set bit of the argument. Returns -1 if none are set.
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Geometry ISA
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Geometry ISA
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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@ -462,7 +462,16 @@ struct tgsi_property_data {
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#define TGSI_OPCODE_LODQ 183
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#define TGSI_OPCODE_LODQ 183
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#define TGSI_OPCODE_LAST 184
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#define TGSI_OPCODE_IBFE 184
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#define TGSI_OPCODE_UBFE 185
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#define TGSI_OPCODE_BFI 186
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#define TGSI_OPCODE_BREV 187
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#define TGSI_OPCODE_POPC 188
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#define TGSI_OPCODE_LSB 189
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#define TGSI_OPCODE_IMSB 190
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#define TGSI_OPCODE_UMSB 191
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#define TGSI_OPCODE_LAST 192
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#define TGSI_SAT_NONE 0 /* do not saturate */
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#define TGSI_SAT_NONE 0 /* do not saturate */
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#define TGSI_SAT_ZERO_ONE 1 /* clamp to [0,1] */
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#define TGSI_SAT_ZERO_ONE 1 /* clamp to [0,1] */
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