intel/compiler: pad all data structures used by shader cache keys
When the compiler pads a data structure, the padded bytes will not be initialized. Shader keys are compared with memcmp and unitialized bytes within the structure breaks this mechanism. Explicitly pad the structures with members, so the compiler is forced to initialize them. Add a warning to indicate if a change to alignment in any of the data structures requires additional padding. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17749>
This commit is contained in:
Mark Janes
Marge Bot
parent
3269a9b6a3
commit
a4a4aefa03
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@ -27,6 +27,7 @@
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#include <stdio.h>
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#include "c11/threads.h"
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#include "dev/intel_device_info.h"
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#include "util/macros.h"
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#include "util/ralloc.h"
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#include "util/u_math.h"
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#include "brw_isa_info.h"
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@ -181,6 +182,13 @@ enum PACKED gfx6_gather_sampler_wa {
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#define BRW_MAX_SAMPLERS 32
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/* Provide explicit padding for each member, to ensure that the compiler
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* initializes every bit in the shader cache keys. The keys will be compared
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* with memcmp.
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*/
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PRAGMA_DIAGNOSTIC_PUSH
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PRAGMA_DIAGNOSTIC_ERROR(-Wpadded)
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/**
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* Sampler information needed by VS, WM, and GS program cache keys.
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*/
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@ -241,6 +249,8 @@ struct brw_base_prog_key {
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* avoid precision issues.
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*/
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bool limit_trig_input_range;
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unsigned padding:16;
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struct brw_sampler_prog_key_data tex;
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};
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@ -328,8 +338,10 @@ struct brw_vs_prog_key {
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* these texture coordinates will need to be unconditionally included in
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* the VUE, even if they aren't written by the vertex shader.
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*/
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uint8_t point_coord_replace;
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unsigned clamp_pointsize:1;
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unsigned padding_1: 1;
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uint8_t point_coord_replace;
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unsigned padding_2: 24;
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};
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/** The program key for Tessellation Control Shaders. */
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@ -343,11 +355,13 @@ struct brw_tcs_prog_key
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/** A bitfield of per-patch outputs written. */
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uint32_t patch_outputs_written;
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unsigned padding_1:32;
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/** A bitfield of per-vertex outputs written. */
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uint64_t outputs_written;
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bool quads_workaround;
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uint64_t padding_2:56;
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};
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/** The program key for Tessellation Evaluation Shaders. */
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@ -357,6 +371,7 @@ struct brw_tes_prog_key
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/** A bitfield of per-patch inputs read. */
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uint32_t patch_inputs_read;
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unsigned padding_1:32;
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/** A bitfield of per-vertex inputs read. */
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uint64_t inputs_read;
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@ -370,6 +385,7 @@ struct brw_tes_prog_key
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*/
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unsigned nr_userclip_plane_consts:4;
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unsigned clamp_pointsize:1;
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uint64_t padding_2:59;
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};
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/** The program key for Geometry Shaders. */
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@ -386,6 +402,7 @@ struct brw_gs_prog_key
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*/
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unsigned nr_userclip_plane_consts:4;
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unsigned clamp_pointsize:1;
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unsigned padding:27;
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};
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struct brw_task_prog_key
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@ -417,6 +434,7 @@ struct brw_sf_prog_key {
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bool do_point_coord:1;
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bool sprite_origin_lower_left:1;
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bool userclip_active:1;
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unsigned padding: 32;
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};
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enum brw_clip_mode {
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@ -455,9 +473,11 @@ struct brw_clip_prog_key {
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bool copy_bfc_ccw:1;
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enum brw_clip_mode clip_mode:3;
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unsigned padding_1:19;
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float offset_factor;
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float offset_units;
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float offset_clamp;
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unsigned padding_2:32;
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};
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/* A big lookup table is used to figure out which and how many
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@ -502,10 +522,13 @@ struct brw_wm_prog_key {
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bool coherent_fb_fetch:1;
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bool ignore_sample_mask_out:1;
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bool coarse_pixel:1;
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unsigned padding_1:2;
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uint8_t color_outputs_valid;
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unsigned padding_2:24;
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uint64_t input_slots_valid;
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float alpha_test_ref;
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unsigned padding_3:32;
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};
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struct brw_cs_prog_key {
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@ -537,6 +560,7 @@ struct brw_ff_gs_prog_key {
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* gl_varying_slot that should be streamed out through that binding table
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* entry.
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*/
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unsigned padding_1:7;
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unsigned char transform_feedback_bindings[BRW_MAX_SOL_BINDINGS];
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/**
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@ -545,6 +569,7 @@ struct brw_ff_gs_prog_key {
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* binding table entry.
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*/
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unsigned char transform_feedback_swizzles[BRW_MAX_SOL_BINDINGS];
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unsigned padding_2:32;
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};
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/* brw_any_prog_key is any of the keys that map to an API stage */
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@ -561,6 +586,8 @@ union brw_any_prog_key {
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struct brw_mesh_prog_key mesh;
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};
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PRAGMA_DIAGNOSTIC_POP
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/*
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* Image metadata structure as laid out in the shader parameter
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* buffer. Entries have to be 16B-aligned for the vec4 back-end to be
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