freedreno/ir3: also track # of nops for shader-db

The instruction count is (mostly) a measure of what optimization passes
can do, while # of nops is more an indication of how effectively the
scheduler is balancing register pressure vs instruction count.  So track
these independently.

(There could be opportunities to rematerialize values to reduce register
pressure, swapping some nop's with other alu instructions, so nothing is
truely independent.. but it is still useful to break these stats out.)

Signed-off-by: Rob Clark <robdclark@chromium.org>
This commit is contained in:
Rob Clark 2019-11-04 11:41:55 -08:00 committed by Rob Clark
parent 5f45818673
commit a3dc975ee7
3 changed files with 7 additions and 1 deletions

View File

@ -922,6 +922,9 @@ void * ir3_assemble(struct ir3 *shader, struct ir3_info *info,
if (ret)
goto fail;
info->instrs_count += 1 + instr->repeat + instr->nop;
info->nops_count += instr->nop;
if (instr->opc == OPC_NOP)
info->nops_count += 1 + instr->repeat;
dwords += 2;
if (instr->flags & IR3_INSTR_SS)

View File

@ -47,6 +47,7 @@ struct ir3_info {
uint32_t gpu_id;
uint16_t sizedwords;
uint16_t instrs_count; /* expanded to account for rpt's */
uint16_t nops_count; /* # of nop instructions, including nopN */
/* NOTE: max_reg, etc, does not include registers not touched
* by the shader (ie. vertex fetched via VFD_DECODE but not
* touched by shader)

View File

@ -51,11 +51,13 @@ dump_shader_info(struct ir3_shader_variant *v, bool binning_pass,
return;
pipe_debug_message(debug, SHADER_INFO,
"%s shader: %u inst, %u dwords, "
"%s shader: %u inst, %u nops, %u non-nops, %u dwords, "
"%u half, %u full, %u constlen, "
"%u (ss), %u (sy), %d max_sun, %d loops\n",
ir3_shader_stage(v),
v->info.instrs_count,
v->info.nops_count,
v->info.instrs_count - v->info.nops_count,
v->info.sizedwords,
v->info.max_half_reg + 1,
v->info.max_reg + 1,