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vc4: Fix render target NPOT alignment at small miplevels. 

The texturing hardware takes the POT level 0 width/height and minifies
those.  This is different from what we were doing, for example, for
273-wide's level 5: POT(273>>5) == 8, while POT(273)>>5 == 16.

Fixes piglit-depthstencil-render-miplevels 273.
This commit is contained in:
Eric Anholt 2014-10-14 14:28:14 +01:00
parent b5fc9d5664
commit a2d8b6dbd5
1 changed files with 12 additions and 3 deletions
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15
src/gallium/drivers/vc4/vc4_state.c
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@ -400,9 +400,18 @@ vc4_set_framebuffer_state(struct pipe_context *pctx,
* framebuffer. Note that if the z/color buffers were mismatched
* sizes, we wouldn't be able to do this.
*/
if ((cso->cbufs[0] && cso->cbufs[0]->u.tex.level) ||
(cso->zsbuf && cso->zsbuf->u.tex.level)) {
cso->width = util_next_power_of_two(cso->width);
if (cso->cbufs[0] && cso->cbufs[0]->u.tex.level) {
struct vc4_resource *rsc =
vc4_resource(cso->cbufs[0]->texture);
cso->width =
(rsc->slices[cso->cbufs[0]->u.tex.level].stride /
rsc->cpp);
} else if (cso->zsbuf && cso->zsbuf->u.tex.level){
struct vc4_resource *rsc =
vc4_resource(cso->zsbuf->texture);
cso->width =
(rsc->slices[cso->zsbuf->u.tex.level].stride /
rsc->cpp);
}
vc4->dirty |= VC4_DIRTY_FRAMEBUFFER;