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intel/eu: print bytes instead of 32 bit hex value 

INTEL_DEBUG=hex prints 32 bit hex value and due to endianness of CPU
byte order is reversed. In order to disassemble binary files, print
each byte instead of 32 bit hex value.

v2: Print blank spaces in order to vertically align output of compacted
    instructions hex value with uncompacted instructions hex value.
    (Matt Turner)

v3: Fix line wrap at correct length

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
This commit is contained in:
Sagar Ghuge 2018-08-27 10:23:19 -07:00 committed by Matt Turner
parent 440a988bd1
commit a1e3305f75
1 changed files with 29 additions and 16 deletions
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45
src/intel/compiler/brw_eu.c
View File

@ -364,24 +364,37 @@ brw_disassemble(const struct gen_device_info *devinfo,
if (compacted) {
brw_compact_inst *compacted = (void *)insn;
if (dump_hex) {
fprintf(out, "0x%08x 0x%08x ",
((uint32_t *)insn)[1],
((uint32_t *)insn)[0]);
}
if (dump_hex) {
unsigned char * insn_ptr = ((unsigned char *)&insn[0]);
const unsigned int blank_spaces = 24;
for (int i = 0 ; i < 8; i = i + 4) {
fprintf(out, "%02x %02x %02x %02x ",
insn_ptr[i],
insn_ptr[i + 1],
insn_ptr[i + 2],
insn_ptr[i + 3]);
}
/* Make compacted instructions hex value output vertically aligned
* with uncompacted instructions hex value
*/
fprintf(out, "%*c", blank_spaces, ' ');
}
brw_uncompact_instruction(devinfo, &uncompacted, compacted);
insn = &uncompacted;
offset += 8;
brw_uncompact_instruction(devinfo, &uncompacted, compacted);
insn = &uncompacted;
offset += 8;
} else {
if (dump_hex) {
fprintf(out, "0x%08x 0x%08x 0x%08x 0x%08x ",
((uint32_t *)insn)[3],
((uint32_t *)insn)[2],
((uint32_t *)insn)[1],
((uint32_t *)insn)[0]);
}
offset += 16;
if (dump_hex) {
unsigned char * insn_ptr = ((unsigned char *)&insn[0]);
for (int i = 0 ; i < 16; i = i + 4) {
fprintf(out, "%02x %02x %02x %02x ",
insn_ptr[i],
insn_ptr[i + 1],
insn_ptr[i + 2],
insn_ptr[i + 3]);
}
}
offset += 16;
}
brw_disassemble_inst(out, devinfo, insn, compacted);