radeonsi: fix HTILE for NPOT textures with mipmapping on SI/CI
VI uses addrlib so it's unaffected. Cc: 18.1 18.2 <mesa-stable@lists.freedesktop.org> Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
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@ -931,8 +931,8 @@ static void si_texture_get_htile_size(struct si_screen *sscreen,
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return;
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}
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width = align(tex->buffer.b.b.width0, cl_width * 8);
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height = align(tex->buffer.b.b.height0, cl_height * 8);
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width = align(tex->surface.u.legacy.level[0].nblk_x, cl_width * 8);
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height = align(tex->surface.u.legacy.level[0].nblk_y, cl_height * 8);
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slice_elements = (width * height) / (8 * 8);
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slice_bytes = slice_elements * 4;
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