lavapipe: use 64bit masks for shader access

ensure that all descriptors are tracked for this

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17739>
This commit is contained in:
Mike Blumenkrantz 2022-07-25 15:30:48 -04:00 committed by Marge Bot
parent 2fd930f95b
commit a18708e5ce
2 changed files with 7 additions and 7 deletions

View File

@ -685,7 +685,7 @@ set_image_access(struct lvp_pipeline *pipeline, nir_shader *nir,
{
nir_variable *var = nir_intrinsic_get_var(instr, 0);
/* calculate the variable's offset in the layout */
unsigned value = 0;
uint64_t value = 0;
const struct lvp_descriptor_set_binding_layout *binding =
get_binding_layout(pipeline->layout, var->data.descriptor_set, var->data.binding);
for (unsigned s = 0; s < var->data.descriptor_set; s++) {
@ -694,7 +694,7 @@ set_image_access(struct lvp_pipeline *pipeline, nir_shader *nir,
}
value += binding->stage[nir->info.stage].image_index;
const unsigned size = glsl_type_is_array(var->type) ? glsl_get_aoa_size(var->type) : 1;
unsigned mask = BITFIELD_MASK(MAX2(size, 1)) << value;
uint64_t mask = BITFIELD64_MASK(MAX2(size, 1)) << value;
if (reads)
pipeline->access[nir->info.stage].images_read |= mask;
@ -719,7 +719,7 @@ set_buffer_access(struct lvp_pipeline *pipeline, nir_shader *nir,
if (var->data.mode != nir_var_mem_ssbo)
return;
/* calculate the variable's offset in the layout */
unsigned value = 0;
uint64_t value = 0;
const struct lvp_descriptor_set_binding_layout *binding =
get_binding_layout(pipeline->layout, var->data.descriptor_set, var->data.binding);
for (unsigned s = 0; s < var->data.descriptor_set; s++) {
@ -729,7 +729,7 @@ set_buffer_access(struct lvp_pipeline *pipeline, nir_shader *nir,
value += binding->stage[nir->info.stage].shader_buffer_index;
/* Structs have been lowered already, so get_aoa_size is sufficient. */
const unsigned size = glsl_type_is_array(var->type) ? glsl_get_aoa_size(var->type) : 1;
unsigned mask = BITFIELD_MASK(MAX2(size, 1)) << value;
uint64_t mask = BITFIELD64_MASK(MAX2(size, 1)) << value;
pipeline->access[nir->info.stage].buffers_written |= mask;
}

View File

@ -417,9 +417,9 @@ struct lvp_pipeline_layout {
};
struct lvp_access_info {
uint32_t images_read;
uint32_t images_written;
uint32_t buffers_written;
uint64_t images_read;
uint64_t images_written;
uint64_t buffers_written;
};
struct lvp_pipeline {