r600: support vertex_array_bgra

Use vertex program key mechanism and swizzle during vertex fetch - is there
a better way?
This commit is contained in:
Andre Maasikas 2009-12-29 14:47:01 +02:00 committed by Alex Deucher
parent 82421c549f
commit a160d1c27d
5 changed files with 25 additions and 6 deletions

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@ -108,6 +108,7 @@ typedef struct StreamDesc
GLint size; //number of data element
GLenum type; //data element type
GLsizei stride;
GLenum format; // GL_RGBA,GLBGRA
struct radeon_bo *bo;
GLint bo_offset;

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@ -798,6 +798,7 @@ GLboolean assemble_vfetch_instruction2(r700_AssemblerBase* pAsm,
GLubyte element,
GLuint _signed,
GLboolean normalize,
GLenum format,
VTX_FETCH_METHOD * pFetchMethod)
{
GLuint client_size_inbyte;
@ -846,10 +847,21 @@ GLboolean assemble_vfetch_instruction2(r700_AssemblerBase* pAsm,
vfetch_instruction_ptr->m_Word0.f.src_sel_x = SQ_SEL_X;
vfetch_instruction_ptr->m_Word0.f.mega_fetch_count = mega_fetch_count;
vfetch_instruction_ptr->m_Word1.f.dst_sel_x = (size < 1) ? SQ_SEL_0 : SQ_SEL_X;
vfetch_instruction_ptr->m_Word1.f.dst_sel_y = (size < 2) ? SQ_SEL_0 : SQ_SEL_Y;
vfetch_instruction_ptr->m_Word1.f.dst_sel_z = (size < 3) ? SQ_SEL_0 : SQ_SEL_Z;
vfetch_instruction_ptr->m_Word1.f.dst_sel_w = (size < 4) ? SQ_SEL_1 : SQ_SEL_W;
if(format == GL_BGRA)
{
vfetch_instruction_ptr->m_Word1.f.dst_sel_x = (size < 1) ? SQ_SEL_0 : SQ_SEL_Z;
vfetch_instruction_ptr->m_Word1.f.dst_sel_y = (size < 2) ? SQ_SEL_0 : SQ_SEL_Y;
vfetch_instruction_ptr->m_Word1.f.dst_sel_z = (size < 3) ? SQ_SEL_0 : SQ_SEL_X;
vfetch_instruction_ptr->m_Word1.f.dst_sel_w = (size < 4) ? SQ_SEL_1 : SQ_SEL_W;
}
else
{
vfetch_instruction_ptr->m_Word1.f.dst_sel_x = (size < 1) ? SQ_SEL_0 : SQ_SEL_X;
vfetch_instruction_ptr->m_Word1.f.dst_sel_y = (size < 2) ? SQ_SEL_0 : SQ_SEL_Y;
vfetch_instruction_ptr->m_Word1.f.dst_sel_z = (size < 3) ? SQ_SEL_0 : SQ_SEL_Z;
vfetch_instruction_ptr->m_Word1.f.dst_sel_w = (size < 4) ? SQ_SEL_1 : SQ_SEL_W;
}
vfetch_instruction_ptr->m_Word1.f.use_const_fields = 1;
vfetch_instruction_ptr->m_Word1.f.data_format = data_format;

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@ -422,6 +422,7 @@ GLboolean assemble_vfetch_instruction2(r700_AssemblerBase* pAsm,
GLubyte element,
GLuint _signed,
GLboolean normalize,
GLenum format,
VTX_FETCH_METHOD * pFetchMethod);
GLboolean cleanup_vfetch_instructions(r700_AssemblerBase* pAsm);
GLuint gethelpr(r700_AssemblerBase* pAsm);

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@ -179,7 +179,8 @@ GLboolean Process_Vertex_Program_Vfetch_Instructions2(
context->stream_desc[i].size,
context->stream_desc[i].element,
context->stream_desc[i]._signed,
context->stream_desc[i].normalize,
context->stream_desc[i].normalize,
context->stream_desc[i].format,
&vtxFetchMethod);
}
@ -308,6 +309,7 @@ struct r700_vertex_program* r700TranslateVertexShader(GLcontext *ctx,
vp->aos_desc[i].size = context->stream_desc[i].size;
vp->aos_desc[i].stride = context->stream_desc[i].stride;
vp->aos_desc[i].type = context->stream_desc[i].type;
vp->aos_desc[i].format = context->stream_desc[i].format;
}
if (context->radeon.radeonScreen->chip_family < CHIP_FAMILY_RV770)
@ -368,7 +370,8 @@ void r700SelectVertexShader(GLcontext *ctx)
match = GL_TRUE;
for(i=0; i<context->nNumActiveAos; i++)
{
if (vp->aos_desc[i].size != context->stream_desc[i].size)
if (vp->aos_desc[i].size != context->stream_desc[i].size ||
vp->aos_desc[i].format != context->stream_desc[i].format)
{
match = GL_FALSE;
break;
@ -471,6 +474,7 @@ static void r700TranslateAttrib(GLcontext *ctx, GLuint unLoc, int count, const s
pStreamDesc->size = input->Size;
pStreamDesc->dst_loc = context->nNumActiveAos;
pStreamDesc->element = unLoc;
pStreamDesc->format = input->Format;
switch (pStreamDesc->type)
{ //GetSurfaceFormat

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@ -39,6 +39,7 @@ typedef struct ArrayDesc //TEMP
GLint size; //number of data element
GLenum type; //data element type
GLsizei stride;
GLenum format; //GL_RGBA or GL_BGRA
} ArrayDesc;
struct r700_vertex_program