pan/midgard: Don't spill near a branch
Fixes dEQP-GLES2.functional.shaders.indexing.varying_array.vec2_dynamic_loop_write_ static_read with register pressure forced down. Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>
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@ -1054,6 +1054,14 @@ mir_schedule_alu(
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bundle.control |= stages[i]->unit;
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bytes_emitted += bytes_for_instruction(stages[i]);
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bundle.instructions[bundle.instruction_count++] = stages[i];
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/* If we branch, we can't spill to TLS since the store
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* instruction will never get executed. We could try to
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* break the bundle but this is probably easier for
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* now. */
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if (branch)
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stages[i]->no_spill |= (1 << REG_CLASS_WORK);
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}
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}
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