pan/midgard: Don't spill near a branch

Fixes
dEQP-GLES2.functional.shaders.indexing.varying_array.vec2_dynamic_loop_write_
static_read with register pressure forced down.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>
This commit is contained in:
Alyssa Rosenzweig 2020-02-24 09:36:18 -05:00 committed by Tomeu Vizoso
parent ed52855680
commit a0b90b45a9
1 changed files with 8 additions and 0 deletions

View File

@ -1054,6 +1054,14 @@ mir_schedule_alu(
bundle.control |= stages[i]->unit;
bytes_emitted += bytes_for_instruction(stages[i]);
bundle.instructions[bundle.instruction_count++] = stages[i];
/* If we branch, we can't spill to TLS since the store
* instruction will never get executed. We could try to
* break the bundle but this is probably easier for
* now. */
if (branch)
stages[i]->no_spill |= (1 << REG_CLASS_WORK);
}
}