From a02e7f679975bba76ee2a5c64b5b43432619b5a5 Mon Sep 17 00:00:00 2001 From: Rhys Perry Date: Thu, 11 Jun 2020 14:06:32 +0100 Subject: [PATCH] aco: fix encoding of certain s_setreg_imm32_b32 instructions MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit If the mode is too small, the operand will be an inline constant and the literal dword won't be written. Signed-off-by: Rhys Perry Reviewed-by: Daniel Schürmann Part-of: --- src/amd/compiler/aco_lower_to_hw_instr.cpp | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/src/amd/compiler/aco_lower_to_hw_instr.cpp b/src/amd/compiler/aco_lower_to_hw_instr.cpp index 5e93dc603e6..441e1b6b8e5 100644 --- a/src/amd/compiler/aco_lower_to_hw_instr.cpp +++ b/src/amd/compiler/aco_lower_to_hw_instr.cpp @@ -1658,7 +1658,9 @@ void lower_to_hw_instr(Program* program) assert(block->kind & block_kind_top_level); uint32_t mode = block->fp_mode.val; /* "((size - 1) << 11) | register" (MODE is encoded as register 1) */ - bld.sopk(aco_opcode::s_setreg_imm32_b32, Operand(mode), (7 << 11) | 1); + Instruction *instr = bld.sopk(aco_opcode::s_setreg_imm32_b32, Operand(mode), (7 << 11) | 1).instr; + /* has to be a literal */ + instr->operands[0].setFixed(PhysReg{255}); } for (size_t j = 0; j < block->instructions.size(); j++) {