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pan/va: Lower FADD_RSCALE.f32 to FMA_RSCALE.f32 

We generate FADD_RSCALE.f32 in our sample variables implementations. Valhall
doesn't have a dedicated FADD_RSCALE.f32 implementation, it should be aliased to
FMA_RSCALE.f32. Handle that alias in isel lowering. This will fix:

   dEQP-GLES31.functional.shaders.multisample_interpolation.interpolate_at_offset.*

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17101>
This commit is contained in:
Alyssa Rosenzweig 2022-06-17 10:40:27 -04:00 committed by Marge Bot
parent 1a882ecdab
commit 9dd0bc92b5
2 changed files with 16 additions and 0 deletions
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8
src/panfrost/bifrost/valhall/test/test-lower-isel.cpp
View File

@ -125,6 +125,14 @@ TEST_F(LowerIsel, MuxInt8) {
NEGCASE(bi_mux_v4i8(b, x, y, z, BI_MUX_FP_ZERO));
}
TEST_F(LowerIsel, FaddRscale) {
CASE(bi_fadd_rscale_f32_to(b, reg, x, y, z, BI_SPECIAL_NONE),
bi_fma_rscale_f32_to(b, reg, x, bi_imm_f32(1.0), y, z, BI_SPECIAL_NONE));
CASE(bi_fadd_rscale_f32_to(b, reg, x, y, z, BI_SPECIAL_N),
bi_fma_rscale_f32_to(b, reg, x, bi_imm_f32(1.0), y, z, BI_SPECIAL_N));
}
TEST_F(LowerIsel, Smoke) {
NEGCASE(bi_fadd_f32_to(b, reg, reg, reg));
NEGCASE(bi_csel_s32_to(b, reg, reg, reg, reg, reg, BI_CMPF_LT));

8
src/panfrost/bifrost/valhall/va_lower_isel.c
View File

@ -111,6 +111,14 @@ va_lower_isel(bi_instr *I)
break;
/* FADD_RSCALE.f32(x, y, z) -> FMA_RSCALE.f32(x, 1.0, y, z) */
case BI_OPCODE_FADD_RSCALE_F32:
I->op = BI_OPCODE_FMA_RSCALE_F32;
I->src[3] = I->src[2];
I->src[2] = I->src[1];
I->src[1] = bi_imm_f32(1.0);
break;
default:
break;
}