aco: value number instructions using the execution mask
This patch tries to give instructions with the same execution mask also the same pass_flags and enables VN for SALU instructions using exec as Operand. This patch also adds back VN for VOPC instructions and removes VN for phis. v2 (by Timur Kristóf): - Fix some regressions. v3 (by Daniel Schürmann): - Fix additional issues Reviewed-By: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
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@ -81,17 +81,6 @@ struct InstrPred {
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return false;
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if (a->operands.size() != b->operands.size() || a->definitions.size() != b->definitions.size())
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return false; /* possible with pseudo-instructions */
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/* We can't value number v_readlane_b32 across control flow or discards
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* because of the possibility of live-range splits.
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* We can't value number permutes for the same reason as
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* v_readlane_b32 and because discards affect the result */
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if (a->opcode == aco_opcode::v_readfirstlane_b32 || a->opcode == aco_opcode::v_readlane_b32 ||
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a->opcode == aco_opcode::ds_bpermute_b32 || a->opcode == aco_opcode::ds_permute_b32 ||
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a->opcode == aco_opcode::ds_swizzle_b32 || a->format == Format::PSEUDO_REDUCTION ||
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a->opcode == aco_opcode::p_phi || a->opcode == aco_opcode::p_linear_phi) {
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if (a->pass_flags != b->pass_flags)
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return false;
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}
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for (unsigned i = 0; i < a->operands.size(); i++) {
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if (a->operands[i].isConstant()) {
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if (!b->operands[i].isConstant())
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@ -108,11 +97,11 @@ struct InstrPred {
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else if (a->operands[i].isUndefined() ^ b->operands[i].isUndefined())
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return false;
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if (a->operands[i].isFixed()) {
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if (a->operands[i].physReg() == exec)
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return false;
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if (!b->operands[i].isFixed())
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return false;
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if (!(a->operands[i].physReg() == b->operands[i].physReg()))
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if (a->operands[i].physReg() != b->operands[i].physReg())
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return false;
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if (a->operands[i].physReg() == exec && a->pass_flags != b->pass_flags)
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return false;
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}
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}
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@ -126,10 +115,19 @@ struct InstrPred {
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if (a->definitions[i].isFixed()) {
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if (!b->definitions[i].isFixed())
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return false;
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if (!(a->definitions[i].physReg() == b->definitions[i].physReg()))
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if (a->definitions[i].physReg() != b->definitions[i].physReg())
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return false;
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if (a->definitions[i].physReg() == exec)
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return false;
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}
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}
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if (a->opcode == aco_opcode::v_readfirstlane_b32)
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return a->pass_flags == b->pass_flags;
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/* The results of VOPC depend on the exec mask if used for subgroup operations. */
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if ((uint32_t) a->format & (uint32_t) Format::VOPC && a->pass_flags != b->pass_flags)
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return false;
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if (a->format == Format::PSEUDO_BRANCH)
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return false;
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if (a->isVOP3()) {
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@ -157,11 +155,6 @@ struct InstrPred {
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aDPP->neg[1] == bDPP->neg[1];
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}
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switch (a->format) {
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case Format::VOPC: {
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/* Since the results depend on the exec mask, these shouldn't
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* be value numbered (this is especially useful for subgroupBallot()). */
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return false;
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}
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case Format::SOPK: {
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SOPK_instruction* aK = static_cast<SOPK_instruction*>(a);
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SOPK_instruction* bK = static_cast<SOPK_instruction*>(b);
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@ -185,7 +178,9 @@ struct InstrPred {
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case Format::PSEUDO_REDUCTION: {
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Pseudo_reduction_instruction *aR = static_cast<Pseudo_reduction_instruction*>(a);
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Pseudo_reduction_instruction *bR = static_cast<Pseudo_reduction_instruction*>(b);
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return aR->reduce_op == bR->reduce_op && aR->cluster_size == bR->cluster_size;
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return aR->pass_flags == bR->pass_flags &&
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aR->reduce_op == bR->reduce_op &&
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aR->cluster_size == bR->cluster_size;
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}
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case Format::MTBUF: {
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/* this is fine since they are only used for vertex input fetches */
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@ -210,14 +205,16 @@ struct InstrPred {
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case Format::SCRATCH:
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return false;
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case Format::DS: {
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/* we already handle potential issue with permute/swizzle above */
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DS_instruction* aD = static_cast<DS_instruction *>(a);
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DS_instruction* bD = static_cast<DS_instruction *>(b);
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if (a->opcode != aco_opcode::ds_bpermute_b32 &&
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a->opcode != aco_opcode::ds_permute_b32 &&
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a->opcode != aco_opcode::ds_swizzle_b32)
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return false;
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return aD->gds == bD->gds && aD->offset0 == bD->offset0 && aD->offset1 == bD->offset1;
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DS_instruction* aD = static_cast<DS_instruction *>(a);
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DS_instruction* bD = static_cast<DS_instruction *>(b);
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return aD->pass_flags == bD->pass_flags &&
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aD->gds == bD->gds &&
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aD->offset0 == bD->offset0 &&
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aD->offset1 == bD->offset1;
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}
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case Format::MIMG: {
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MIMG_instruction* aM = static_cast<MIMG_instruction*>(a);
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@ -248,7 +245,13 @@ struct vn_ctx {
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Program* program;
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expr_set expr_values;
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std::map<uint32_t, Temp> renames;
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uint32_t exec_id = 0;
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/* The exec id should be the same on the same level of control flow depth.
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* Together with the check for dominator relations, it is safe to assume
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* that the same exec_id also means the same execution mask.
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* Discards increment the exec_id, so that it won't return to the previous value.
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*/
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uint32_t exec_id = 1;
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vn_ctx(Program* program) : program(program) {}
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};
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@ -276,7 +279,7 @@ void process_block(vn_ctx& ctx, Block& block)
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op.setTemp(it->second);
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}
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if (instr->definitions.empty()) {
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if (instr->definitions.empty() || instr->opcode == aco_opcode::p_phi || instr->opcode == aco_opcode::p_linear_phi) {
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new_instructions.emplace_back(std::move(instr));
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continue;
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}
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@ -339,14 +342,34 @@ void rename_phi_operands(Block& block, std::map<uint32_t, Temp>& renames)
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void value_numbering(Program* program)
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{
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vn_ctx ctx(program);
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std::vector<unsigned> loop_headers;
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for (Block& block : program->blocks) {
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assert(ctx.exec_id > 0);
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/* decrement exec_id when leaving nested control flow */
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if (block.kind & block_kind_loop_header)
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loop_headers.push_back(block.index);
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if (block.kind & block_kind_merge) {
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ctx.exec_id--;
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} else if (block.kind & block_kind_loop_exit) {
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ctx.exec_id -= program->blocks[loop_headers.back()].logical_preds.size();
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ctx.exec_id -= block.logical_preds.size();
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loop_headers.pop_back();
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}
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if (block.logical_idom != -1)
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process_block(ctx, block);
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else
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rename_phi_operands(block, ctx.renames);
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ctx.exec_id++;
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/* increment exec_id when entering nested control flow */
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if (block.kind & block_kind_branch ||
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block.kind & block_kind_loop_preheader ||
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block.kind & block_kind_break ||
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block.kind & block_kind_continue)
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ctx.exec_id++;
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else if (block.kind & block_kind_continue_or_break)
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ctx.exec_id += 2;
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}
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/* rename loop header phi operands */
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