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radeonsi: expand the compressed color and depth texture masks to 64 bits 

This is in preparation of raising the number of exposed sampler views to 32
bits, which will raise the total number of sampler views to 33 for the
polygon stipple texture. That texture should never be compressed (and it's
certainly not a depth texture), but this approach seems cleaner to me than
special-casing the last slot in all affected code paths.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
This commit is contained in:
Nicolai Hähnle 2016-04-06 11:58:42 -05:00
parent f270067ef9
commit 9d2693f58a
3 changed files with 18 additions and 18 deletions
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12
src/gallium/drivers/radeonsi/si_blit.c
View File

@ -246,14 +246,14 @@ si_flush_depth_textures(struct si_context *sctx,
struct si_textures_info *textures)
{
unsigned i;
unsigned mask = textures->depth_texture_mask;
uint64_t mask = textures->depth_texture_mask;
while (mask) {
struct pipe_sampler_view *view;
struct si_sampler_view *sview;
struct r600_texture *tex;
i = u_bit_scan(&mask);
i = u_bit_scan64(&mask);
view = textures->views.views[i];
assert(view);
@ -329,13 +329,13 @@ si_decompress_sampler_color_textures(struct si_context *sctx,
struct si_textures_info *textures)
{
unsigned i;
unsigned mask = textures->compressed_colortex_mask;
uint64_t mask = textures->compressed_colortex_mask;
while (mask) {
struct pipe_sampler_view *view;
struct r600_texture *tex;
i = u_bit_scan(&mask);
i = u_bit_scan64(&mask);
view = textures->views.views[i];
assert(view);
@ -355,13 +355,13 @@ si_decompress_image_color_textures(struct si_context *sctx,
struct si_images_info *images)
{
unsigned i;
unsigned mask = images->compressed_colortex_mask;
uint64_t mask = images->compressed_colortex_mask;
while (mask) {
const struct pipe_image_view *view;
struct r600_texture *tex;
i = u_bit_scan(&mask);
i = u_bit_scan64(&mask);
view = &images->views[i];
assert(view->resource->target != PIPE_BUFFER);

20
src/gallium/drivers/radeonsi/si_descriptors.c
View File

@ -264,8 +264,8 @@ static void si_set_sampler_views(struct pipe_context *ctx,
unsigned slot = start + i;
if (!views || !views[i]) {
samplers->depth_texture_mask &= ~(1 << slot);
samplers->compressed_colortex_mask &= ~(1 << slot);
samplers->depth_texture_mask &= ~(1llu << slot);
samplers->compressed_colortex_mask &= ~(1llu << slot);
si_set_sampler_view(sctx, &samplers->views, slot, NULL);
continue;
}
@ -277,18 +277,18 @@ static void si_set_sampler_views(struct pipe_context *ctx,
(struct r600_texture*)views[i]->texture;
if (rtex->is_depth && !rtex->is_flushing_texture) {
samplers->depth_texture_mask |= 1 << slot;
samplers->depth_texture_mask |= 1llu << slot;
} else {
samplers->depth_texture_mask &= ~(1 << slot);
samplers->depth_texture_mask &= ~(1llu << slot);
}
if (is_compressed_colortex(rtex)) {
samplers->compressed_colortex_mask |= 1 << slot;
samplers->compressed_colortex_mask |= 1llu << slot;
} else {
samplers->compressed_colortex_mask &= ~(1 << slot);
samplers->compressed_colortex_mask &= ~(1llu << slot);
}
} else {
samplers->depth_texture_mask &= ~(1 << slot);
samplers->compressed_colortex_mask &= ~(1 << slot);
samplers->depth_texture_mask &= ~(1llu << slot);
samplers->compressed_colortex_mask &= ~(1llu << slot);
}
}
}
@ -306,9 +306,9 @@ si_samplers_update_compressed_colortex_mask(struct si_textures_info *samplers)
struct r600_texture *rtex = (struct r600_texture *)res;
if (is_compressed_colortex(rtex)) {
samplers->compressed_colortex_mask |= 1 << i;
samplers->compressed_colortex_mask |= 1llu << i;
} else {
samplers->compressed_colortex_mask &= ~(1 << i);
samplers->compressed_colortex_mask &= ~(1llu << i);
}
}
}

4
src/gallium/drivers/radeonsi/si_pipe.h
View File

@ -137,8 +137,8 @@ struct si_cs_shader_state {
struct si_textures_info {
struct si_sampler_views views;
uint32_t depth_texture_mask; /* which textures are depth */
uint32_t compressed_colortex_mask;
uint64_t depth_texture_mask; /* which textures are depth */
uint64_t compressed_colortex_mask;
};
struct si_images_info {