i965/gen8: Check correct number of blitter dwords
The odds of having this patch make a difference on Gen8+ are probably very low. Signed-off-by: Ben Widawsky <ben@bwidawsk.net> Reviewed-but-not-tested-by: Jason Ekstrand <jason.ekstrand@intel.com>
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@ -335,7 +335,9 @@ intelEmitCopyBlit(struct brw_context *brw,
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if (pass >= 2)
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return false;
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intel_batchbuffer_require_space(brw, 8 * 4, BLT_RING);
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unsigned length = brw->gen >= 8 ? 10 : 8;
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intel_batchbuffer_require_space(brw, length * 4, BLT_RING);
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DBG("%s src:buf(%p)/%d+%d %d,%d dst:buf(%p)/%d+%d %d,%d sz:%dx%d\n",
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__FUNCTION__,
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src_buffer, src_pitch, src_offset, src_x, src_y,
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@ -399,8 +401,6 @@ intelEmitCopyBlit(struct brw_context *brw,
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assert(dst_offset + (dst_y + h - 1) * abs(dst_pitch) +
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(w * cpp) <= dst_buffer->size);
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unsigned length = brw->gen >= 8 ? 10 : 8;
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BEGIN_BATCH_BLT_TILED(length, dst_y_tiled, src_y_tiled);
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OUT_BATCH(CMD | (length - 2));
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OUT_BATCH(BR13 | (uint16_t)dst_pitch);
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@ -467,7 +467,9 @@ intelEmitImmediateColorExpandBlit(struct brw_context *brw,
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__FUNCTION__,
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dst_buffer, dst_pitch, dst_offset, x, y, w, h, src_size, dwords);
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intel_batchbuffer_require_space(brw, (8 * 4) + (3 * 4) + dwords * 4, BLT_RING);
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unsigned xy_setup_blt_length = brw->gen >= 8 ? 10 : 8;
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intel_batchbuffer_require_space(brw, (xy_setup_blt_length * 4) +
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(3 * 4) + dwords * 4, BLT_RING);
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opcode = XY_SETUP_BLT_CMD;
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if (cpp == 4)
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@ -484,8 +486,6 @@ intelEmitImmediateColorExpandBlit(struct brw_context *brw,
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if (dst_tiling != I915_TILING_NONE)
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blit_cmd |= XY_DST_TILED;
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unsigned xy_setup_blt_length = brw->gen >= 8 ? 10 : 8;
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BEGIN_BATCH_BLT(xy_setup_blt_length + 3);
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OUT_BATCH(opcode | (xy_setup_blt_length - 2));
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OUT_BATCH(br13);
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