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swr/rast: Misc cleanup 

Together with correct detection of clipDistance NaNs when no cullDistance is set

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
This commit is contained in:
George Kyriazis 2018-02-02 01:12:29 -06:00
parent 036c8b6247
commit 9cc9688e49
3 changed files with 60 additions and 49 deletions
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2
src/gallium/drivers/swr/rasterizer/core/clip.h
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@ -703,7 +703,7 @@ public:
primMask &= ~ComputeNaNMask(prim);
// user cull distance cull
if (state.backendState.cullDistanceMask)
if (state.backendState.cullDistanceMask | state.backendState.clipDistanceMask)
{
primMask &= ~ComputeUserClipCullMask(pa, prim);
}

26
src/gallium/drivers/swr/rasterizer/core/context.h
View File

@ -227,8 +227,9 @@ OSALIGNLINE(struct) API_STATE
// Vertex Buffers
SWR_VERTEX_BUFFER_STATE vertexBuffers[KNOB_NUM_STREAMS];
// Index Buffer
SWR_INDEX_BUFFER_STATE indexBuffer;
// GS - Geometry Shader State
SWR_GS_STATE gsState;
PFN_GS_FUNC pfnGsFunc;
// FS - Fetch Shader State
PFN_FETCH_FUNC pfnFetchFunc;
@ -236,9 +237,8 @@ OSALIGNLINE(struct) API_STATE
// VS - Vertex Shader State
PFN_VERTEX_FUNC pfnVertexFunc;
// GS - Geometry Shader State
PFN_GS_FUNC pfnGsFunc;
SWR_GS_STATE gsState;
// Index Buffer
SWR_INDEX_BUFFER_STATE indexBuffer;
// CS - Compute Shader
PFN_CS_FUNC pfnCsFunc;
@ -265,8 +265,6 @@ OSALIGNLINE(struct) API_STATE
// Number of attributes used by the frontend (vs, so, gs)
uint32_t feNumAttributes;
PRIMITIVE_TOPOLOGY topology;
bool forceFront;
// RS - Rasterizer State
SWR_RASTSTATE rastState;
@ -282,8 +280,12 @@ OSALIGNLINE(struct) API_STATE
SWR_RECT scissorsInFixedPoint[KNOB_NUM_VIEWPORTS_SCISSORS];
bool scissorsTileAligned;
bool forceFront;
PRIMITIVE_TOPOLOGY topology;
// Backend state
SWR_BACKEND_STATE backendState;
OSALIGNLINE(SWR_BACKEND_STATE) backendState;
SWR_DEPTH_BOUNDS_STATE depthBoundsState;
@ -400,8 +402,6 @@ struct DRAW_CONTEXT
DispatchQueue* pDispatch; // Queue for thread groups. (isCompute)
};
DRAW_STATE* pState; // Read-only state. Core should not update this outside of API thread.
DRAW_DYNAMIC_STATE dynState;
CachingArena* pArena;
uint32_t drawId;
@ -412,11 +412,13 @@ struct DRAW_CONTEXT
FE_WORK FeWork;
SYNC_DESC retireCallback; // Call this func when this DC is retired.
DRAW_DYNAMIC_STATE dynState;
volatile OSALIGNLINE(bool) doneFE; // Is FE work done for this draw?
volatile OSALIGNLINE(uint32_t) FeLock;
volatile OSALIGNLINE(uint32_t) threadsDone;
SYNC_DESC retireCallback; // Call this func when this DC is retired.
};
static_assert((sizeof(DRAW_CONTEXT) & 63) == 0, "Invalid size for DRAW_CONTEXT");

53
src/gallium/drivers/swr/rasterizer/core/state.h
View File

@ -553,11 +553,10 @@ struct SWR_SURFACE_STATE
// in the fetch shader jit
struct SWR_VERTEX_BUFFER_STATE
{
gfxptr_t xpData;
uint32_t index;
uint32_t pitch;
gfxptr_t xpData;
uint32_t size;
uint32_t numaNode;
uint32_t minVertex; // min vertex (for bounds checking)
uint32_t maxVertex; // size / pitch. precalculated value used by fetch shader for OOB checks
uint32_t partialInboundsSize; // size % pitch. precalculated value used by fetch shader for partially OOB vertices
@ -565,9 +564,9 @@ struct SWR_VERTEX_BUFFER_STATE
struct SWR_INDEX_BUFFER_STATE
{
const void *pIndices;
// Format type for indices (e.g. UINT16, UINT32, etc.)
SWR_FORMAT format; // @llvm_enum
const void *pIndices;
uint32_t size;
};
@ -646,12 +645,15 @@ OSALIGNLINE(struct) SWR_STATS_FE
struct SWR_STREAMOUT_BUFFER
{
bool enable;
bool soWriteEnable;
// Pointers to streamout buffers.
uint32_t* pBuffer;
// Offset to the SO write offset. If not null then we update offset here.
uint32_t* pWriteOffset;
bool enable;
bool soWriteEnable;
// Size of buffer in dwords.
uint32_t bufferSize;
@ -660,10 +662,6 @@ struct SWR_STREAMOUT_BUFFER
// Offset into buffer in dwords. SOS will increment this offset.
uint32_t streamOffset;
// Offset to the SO write offset. If not null then we update offset here.
uint32_t* pWriteOffset;
};
//////////////////////////////////////////////////////////////////////////
@ -718,6 +716,11 @@ struct SWR_GS_STATE
{
bool gsEnable;
// If true, geometry shader emits a single stream, with separate cut buffer.
// If false, geometry shader emits vertices for multiple streams to the stream buffer, with a separate StreamID buffer
// to map vertices to streams
bool isSingleStream;
// Number of input attributes per vertex. Used by the frontend to
// optimize assembling primitives for GS
uint32_t numInputAttribs;
@ -734,11 +737,6 @@ struct SWR_GS_STATE
// Instance count
uint32_t instanceCount;
// If true, geometry shader emits a single stream, with separate cut buffer.
// If false, geometry shader emits vertices for multiple streams to the stream buffer, with a separate StreamID buffer
// to map vertices to streams
bool isSingleStream;
// When single stream is enabled, singleStreamID dictates which stream is being output.
// field ignored if isSingleStream is false
uint32_t singleStreamID;
@ -768,7 +766,11 @@ struct SWR_GS_STATE
// Set this to non-zero to indicate that the shader outputs a static number of verts. If zero, shader is
// expected to store the final vertex count in the first dword of the gs output stream.
uint32_t staticVertexCount;
uint32_t pad;
};
static_assert(sizeof(SWR_GS_STATE) == 64,
"Adjust padding to keep size (or remove this assert)");
//////////////////////////////////////////////////////////////////////////
@ -814,6 +816,7 @@ enum SWR_TS_DOMAIN
struct SWR_TS_STATE
{
bool tsEnable;
SWR_TS_OUTPUT_TOPOLOGY tsOutputTopology; // @llvm_enum
SWR_TS_PARTITIONING partitioning; // @llvm_enum
SWR_TS_DOMAIN domain; // @llvm_enum
@ -1092,27 +1095,33 @@ struct SWR_BACKEND_STATE
uint32_t constantInterpolationMask; // bitmask indicating which attributes have constant interpolation
uint32_t pointSpriteTexCoordMask; // bitmask indicating the attribute(s) which should be interpreted as tex coordinates
uint8_t numAttributes; // total number of attributes to send to backend (up to 32)
uint8_t numComponents[32]; // number of components to setup per attribute, this reduces some calculations for unneeded components
bool swizzleEnable; // when enabled, core will parse the swizzle map when
// setting up attributes for the backend, otherwise
// all attributes up to numAttributes will be sent
SWR_ATTRIB_SWIZZLE swizzleMap[32];
uint8_t numAttributes; // total number of attributes to send to backend (up to 32)
uint8_t numComponents[32]; // number of components to setup per attribute, this reduces some calculations for unneeded components
bool readRenderTargetArrayIndex; // Forward render target array index from last FE stage to the backend
bool readViewportArrayIndex; // Read viewport array index from last FE stage during binning
// Offset to the start of the attributes of the input vertices, in simdvector units
uint32_t vertexAttribOffset;
// User clip/cull distance enables
uint8_t cullDistanceMask;
uint8_t clipDistanceMask;
// padding to ensure swizzleMap starts 64B offset from start of the struct
// and that the next fields are dword aligned.
uint8_t pad[10];
// Offset to the start of the attributes of the input vertices, in simdvector units
uint32_t vertexAttribOffset;
// Offset to clip/cull attrib section of the vertex, in simdvector units
uint32_t vertexClipCullOffset;
SWR_ATTRIB_SWIZZLE swizzleMap[32];
};
static_assert(sizeof(SWR_BACKEND_STATE) == 128,
"Adjust padding to keep size (or remove this assert)");
union SWR_DEPTH_STENCIL_STATE