turnip: emit HW init in tu_BeginCommandBuffer
Being the first commit that emits meaningful command packets, there are many things included in this commit - tu6_emit_xxx are low-level helpers that emit command packets without boundary checks - tu6_xxx are high-level helpers that emit command packets with boundary checks - cmdbuf->cs is a pointer to the current CS, so that we can use the helpers above to emit to other CS - use cmd as the variable name of tu_cmd_buffer - there is a per-cmdbuf scratch bo for CP_EVENT_WRITE writeback - there is a per-cmdbuf debug marker, using scratch reg 7 or 6 depending on whether the cmdbuf is primary or secondary (olv, after rebase) REG_A6XX_SP_UNKNOWN_AB20 is renamed
This commit is contained in:
parent
3b3af6321b
commit
9c83a7572b
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@ -27,8 +27,12 @@
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#include "tu_private.h"
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#include "registers/adreno_pm4.xml.h"
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#include "registers/adreno_common.xml.h"
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#include "registers/a6xx.xml.h"
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#include "vk_format.h"
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#include "adreno_pm4.xml.h"
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#include "tu_cs.h"
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void
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@ -103,6 +107,206 @@ tu_bo_list_merge(struct tu_bo_list *list, const struct tu_bo_list *other)
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return VK_SUCCESS;
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}
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static void
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tu6_emit_marker(struct tu_cmd_buffer *cmd)
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{
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tu_cs_emit_write_reg(cmd->cur_cs, cmd->marker_reg, ++cmd->marker_seqno);
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}
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static void
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tu6_emit_event_write(struct tu_cmd_buffer *cmd,
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enum vgt_event_type event,
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bool need_seqno)
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{
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struct tu_cs *cs = cmd->cur_cs;
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tu_cs_emit_pkt7(cs, CP_EVENT_WRITE, need_seqno ? 4 : 1);
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tu_cs_emit(cs, CP_EVENT_WRITE_0_EVENT(event));
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if (need_seqno) {
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tu_cs_emit_qw(cs, cmd->scratch_bo.iova);
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tu_cs_emit(cs, ++cmd->scratch_seqno);
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}
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}
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static void
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tu6_emit_cache_flush(struct tu_cmd_buffer *cmd)
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{
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tu6_emit_event_write(cmd, 0x31, false);
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}
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static void
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tu6_init_hw(struct tu_cmd_buffer *cmd)
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{
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struct tu_cs *cs = cmd->cur_cs;
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VkResult result = tu_cs_reserve_space(cmd->device, cs, 256);
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if (result != VK_SUCCESS) {
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cmd->record_result = result;
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return;
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}
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tu6_emit_cache_flush(cmd);
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tu_cs_emit_write_reg(cs, REG_A6XX_HLSQ_UPDATE_CNTL, 0xfffff);
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tu_cs_emit_write_reg(cs, REG_A6XX_RB_CCU_CNTL, 0x7c400004);
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tu_cs_emit_write_reg(cs, REG_A6XX_RB_UNKNOWN_8E04, 0x00100000);
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tu_cs_emit_write_reg(cs, REG_A6XX_SP_UNKNOWN_AE04, 0x8);
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tu_cs_emit_write_reg(cs, REG_A6XX_SP_UNKNOWN_AE00, 0);
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tu_cs_emit_write_reg(cs, REG_A6XX_SP_UNKNOWN_AE0F, 0x3f);
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tu_cs_emit_write_reg(cs, REG_A6XX_SP_UNKNOWN_B605, 0x44);
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tu_cs_emit_write_reg(cs, REG_A6XX_SP_UNKNOWN_B600, 0x100000);
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tu_cs_emit_write_reg(cs, REG_A6XX_HLSQ_UNKNOWN_BE00, 0x80);
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tu_cs_emit_write_reg(cs, REG_A6XX_HLSQ_UNKNOWN_BE01, 0);
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tu_cs_emit_write_reg(cs, REG_A6XX_VPC_UNKNOWN_9600, 0);
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tu_cs_emit_write_reg(cs, REG_A6XX_GRAS_UNKNOWN_8600, 0x880);
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tu_cs_emit_write_reg(cs, REG_A6XX_HLSQ_UNKNOWN_BE04, 0);
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tu_cs_emit_write_reg(cs, REG_A6XX_SP_UNKNOWN_AE03, 0x00000410);
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tu_cs_emit_write_reg(cs, REG_A6XX_SP_IBO_COUNT, 0);
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tu_cs_emit_write_reg(cs, REG_A6XX_SP_UNKNOWN_B182, 0);
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tu_cs_emit_write_reg(cs, REG_A6XX_HLSQ_UNKNOWN_BB11, 0);
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tu_cs_emit_write_reg(cs, REG_A6XX_UCHE_UNKNOWN_0E12, 0x3200000);
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tu_cs_emit_write_reg(cs, REG_A6XX_UCHE_CLIENT_PF, 4);
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tu_cs_emit_write_reg(cs, REG_A6XX_RB_UNKNOWN_8E01, 0x0);
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tu_cs_emit_write_reg(cs, REG_A6XX_SP_UNKNOWN_AB00, 0x5);
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tu_cs_emit_write_reg(cs, REG_A6XX_VFD_UNKNOWN_A009, 0x00000001);
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tu_cs_emit_write_reg(cs, REG_A6XX_RB_UNKNOWN_8811, 0x00000010);
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tu_cs_emit_write_reg(cs, REG_A6XX_PC_MODE_CNTL, 0x1f);
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tu_cs_emit_write_reg(cs, REG_A6XX_RB_SRGB_CNTL, 0);
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tu_cs_emit_write_reg(cs, REG_A6XX_GRAS_UNKNOWN_8101, 0);
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tu_cs_emit_write_reg(cs, REG_A6XX_GRAS_UNKNOWN_8109, 0);
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tu_cs_emit_write_reg(cs, REG_A6XX_GRAS_UNKNOWN_8110, 0);
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tu_cs_emit_write_reg(cs, REG_A6XX_RB_RENDER_CONTROL0, 0x401);
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tu_cs_emit_write_reg(cs, REG_A6XX_RB_RENDER_CONTROL1, 0);
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tu_cs_emit_write_reg(cs, REG_A6XX_RB_FS_OUTPUT_CNTL0, 0);
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tu_cs_emit_write_reg(cs, REG_A6XX_RB_UNKNOWN_8810, 0);
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tu_cs_emit_write_reg(cs, REG_A6XX_RB_UNKNOWN_8818, 0);
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tu_cs_emit_write_reg(cs, REG_A6XX_RB_UNKNOWN_8819, 0);
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tu_cs_emit_write_reg(cs, REG_A6XX_RB_UNKNOWN_881A, 0);
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tu_cs_emit_write_reg(cs, REG_A6XX_RB_UNKNOWN_881B, 0);
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tu_cs_emit_write_reg(cs, REG_A6XX_RB_UNKNOWN_881C, 0);
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tu_cs_emit_write_reg(cs, REG_A6XX_RB_UNKNOWN_881D, 0);
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tu_cs_emit_write_reg(cs, REG_A6XX_RB_UNKNOWN_881E, 0);
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tu_cs_emit_write_reg(cs, REG_A6XX_RB_UNKNOWN_88F0, 0);
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tu_cs_emit_write_reg(cs, REG_A6XX_VPC_UNKNOWN_9101, 0xffff00);
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tu_cs_emit_write_reg(cs, REG_A6XX_VPC_UNKNOWN_9107, 0);
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tu_cs_emit_write_reg(cs, REG_A6XX_VPC_UNKNOWN_9236, 1);
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tu_cs_emit_write_reg(cs, REG_A6XX_VPC_UNKNOWN_9300, 0);
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tu_cs_emit_write_reg(cs, REG_A6XX_VPC_SO_OVERRIDE,
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A6XX_VPC_SO_OVERRIDE_SO_DISABLE);
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tu_cs_emit_write_reg(cs, REG_A6XX_PC_UNKNOWN_9801, 0);
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tu_cs_emit_write_reg(cs, REG_A6XX_PC_UNKNOWN_9806, 0);
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tu_cs_emit_write_reg(cs, REG_A6XX_PC_UNKNOWN_9980, 0);
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tu_cs_emit_write_reg(cs, REG_A6XX_PC_UNKNOWN_9B06, 0);
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tu_cs_emit_write_reg(cs, REG_A6XX_PC_UNKNOWN_9B06, 0);
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tu_cs_emit_write_reg(cs, REG_A6XX_SP_UNKNOWN_A81B, 0);
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tu_cs_emit_write_reg(cs, REG_A6XX_SP_UNKNOWN_B183, 0);
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tu_cs_emit_write_reg(cs, REG_A6XX_GRAS_UNKNOWN_8099, 0);
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tu_cs_emit_write_reg(cs, REG_A6XX_GRAS_UNKNOWN_809B, 0);
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tu_cs_emit_write_reg(cs, REG_A6XX_GRAS_UNKNOWN_80A0, 2);
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tu_cs_emit_write_reg(cs, REG_A6XX_GRAS_UNKNOWN_80AF, 0);
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tu_cs_emit_write_reg(cs, REG_A6XX_VPC_UNKNOWN_9210, 0);
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tu_cs_emit_write_reg(cs, REG_A6XX_VPC_UNKNOWN_9211, 0);
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tu_cs_emit_write_reg(cs, REG_A6XX_VPC_UNKNOWN_9602, 0);
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tu_cs_emit_write_reg(cs, REG_A6XX_PC_UNKNOWN_9981, 0x3);
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tu_cs_emit_write_reg(cs, REG_A6XX_PC_UNKNOWN_9E72, 0);
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tu_cs_emit_write_reg(cs, REG_A6XX_VPC_UNKNOWN_9108, 0x3);
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tu_cs_emit_write_reg(cs, REG_A6XX_SP_TP_UNKNOWN_B304, 0);
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tu_cs_emit_write_reg(cs, REG_A6XX_SP_TP_UNKNOWN_B309, 0x000000a2);
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tu_cs_emit_write_reg(cs, REG_A6XX_RB_UNKNOWN_8804, 0);
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tu_cs_emit_write_reg(cs, REG_A6XX_GRAS_UNKNOWN_80A4, 0);
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tu_cs_emit_write_reg(cs, REG_A6XX_GRAS_UNKNOWN_80A5, 0);
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tu_cs_emit_write_reg(cs, REG_A6XX_GRAS_UNKNOWN_80A6, 0);
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tu_cs_emit_write_reg(cs, REG_A6XX_RB_UNKNOWN_8805, 0);
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tu_cs_emit_write_reg(cs, REG_A6XX_RB_UNKNOWN_8806, 0);
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tu_cs_emit_write_reg(cs, REG_A6XX_RB_UNKNOWN_8878, 0);
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tu_cs_emit_write_reg(cs, REG_A6XX_RB_UNKNOWN_8879, 0);
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tu_cs_emit_write_reg(cs, REG_A6XX_HLSQ_CONTROL_5_REG, 0xfc);
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tu6_emit_marker(cmd);
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tu_cs_emit_write_reg(cs, REG_A6XX_VFD_MODE_CNTL, 0x00000000);
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tu_cs_emit_write_reg(cs, REG_A6XX_VFD_UNKNOWN_A008, 0);
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tu_cs_emit_write_reg(cs, REG_A6XX_PC_MODE_CNTL, 0x0000001f);
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/* we don't use this yet.. probably best to disable.. */
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tu_cs_emit_pkt7(cs, CP_SET_DRAW_STATE, 3);
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tu_cs_emit(cs, CP_SET_DRAW_STATE__0_COUNT(0) |
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CP_SET_DRAW_STATE__0_DISABLE_ALL_GROUPS |
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CP_SET_DRAW_STATE__0_GROUP_ID(0));
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tu_cs_emit(cs, CP_SET_DRAW_STATE__1_ADDR_LO(0));
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tu_cs_emit(cs, CP_SET_DRAW_STATE__2_ADDR_HI(0));
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tu_cs_emit_pkt4(cs, REG_A6XX_VPC_SO_BUFFER_BASE_LO(0), 3);
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tu_cs_emit(cs, 0x00000000); /* VPC_SO_BUFFER_BASE_LO_0 */
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tu_cs_emit(cs, 0x00000000); /* VPC_SO_BUFFER_BASE_HI_0 */
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tu_cs_emit(cs, 0x00000000); /* VPC_SO_BUFFER_SIZE_0 */
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tu_cs_emit_pkt4(cs, REG_A6XX_VPC_SO_FLUSH_BASE_LO(0), 2);
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tu_cs_emit(cs, 0x00000000); /* VPC_SO_FLUSH_BASE_LO_0 */
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tu_cs_emit(cs, 0x00000000); /* VPC_SO_FLUSH_BASE_HI_0 */
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tu_cs_emit_pkt4(cs, REG_A6XX_VPC_SO_BUF_CNTL, 1);
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tu_cs_emit(cs, 0x00000000); /* VPC_SO_BUF_CNTL */
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tu_cs_emit_pkt4(cs, REG_A6XX_VPC_SO_BUFFER_OFFSET(0), 1);
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tu_cs_emit(cs, 0x00000000); /* UNKNOWN_E2AB */
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tu_cs_emit_pkt4(cs, REG_A6XX_VPC_SO_BUFFER_BASE_LO(1), 3);
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tu_cs_emit(cs, 0x00000000);
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tu_cs_emit(cs, 0x00000000);
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tu_cs_emit(cs, 0x00000000);
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tu_cs_emit_pkt4(cs, REG_A6XX_VPC_SO_BUFFER_OFFSET(1), 6);
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tu_cs_emit(cs, 0x00000000);
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tu_cs_emit(cs, 0x00000000);
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tu_cs_emit(cs, 0x00000000);
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tu_cs_emit(cs, 0x00000000);
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tu_cs_emit(cs, 0x00000000);
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tu_cs_emit(cs, 0x00000000);
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tu_cs_emit_pkt4(cs, REG_A6XX_VPC_SO_BUFFER_OFFSET(2), 6);
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tu_cs_emit(cs, 0x00000000);
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tu_cs_emit(cs, 0x00000000);
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tu_cs_emit(cs, 0x00000000);
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tu_cs_emit(cs, 0x00000000);
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tu_cs_emit(cs, 0x00000000);
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tu_cs_emit(cs, 0x00000000);
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tu_cs_emit_pkt4(cs, REG_A6XX_VPC_SO_BUFFER_OFFSET(3), 3);
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tu_cs_emit(cs, 0x00000000);
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tu_cs_emit(cs, 0x00000000);
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tu_cs_emit(cs, 0x00000000);
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tu_cs_emit_pkt4(cs, REG_A6XX_SP_HS_CTRL_REG0, 1);
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tu_cs_emit(cs, 0x00000000);
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tu_cs_emit_pkt4(cs, REG_A6XX_SP_GS_CTRL_REG0, 1);
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tu_cs_emit(cs, 0x00000000);
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tu_cs_emit_pkt4(cs, REG_A6XX_GRAS_LRZ_CNTL, 1);
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tu_cs_emit(cs, 0x00000000);
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tu_cs_emit_pkt4(cs, REG_A6XX_RB_LRZ_CNTL, 1);
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tu_cs_emit(cs, 0x00000000);
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tu_cs_reserve_space_assert(cs);
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}
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const struct tu_dynamic_state default_dynamic_state = {
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.viewport =
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{
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@ -280,12 +484,21 @@ tu_create_cmd_buffer(struct tu_device *device,
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list_inithead(&cmd_buffer->upload.list);
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cmd_buffer->marker_reg = REG_A6XX_CP_SCRATCH_REG(
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cmd_buffer->level == VK_COMMAND_BUFFER_LEVEL_PRIMARY ? 7 : 6);
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VkResult result = tu_bo_init_new(device, &cmd_buffer->scratch_bo, 0x1000);
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if (result != VK_SUCCESS)
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return result;
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return VK_SUCCESS;
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}
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static void
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tu_cmd_buffer_destroy(struct tu_cmd_buffer *cmd_buffer)
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{
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tu_bo_finish(cmd_buffer->device, &cmd_buffer->scratch_bo);
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list_del(&cmd_buffer->pool_link);
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for (unsigned i = 0; i < VK_PIPELINE_BIND_POINT_RANGE_SIZE; i++)
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@ -474,30 +687,28 @@ tu_BeginCommandBuffer(VkCommandBuffer commandBuffer,
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memset(&cmd_buffer->state, 0, sizeof(cmd_buffer->state));
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cmd_buffer->usage_flags = pBeginInfo->flags;
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result = tu_cs_begin(cmd_buffer->device, &cmd_buffer->cs, 4096);
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if (result != VK_SUCCESS)
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return result;
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cmd_buffer->marker_seqno = 0;
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cmd_buffer->scratch_seqno = 0;
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cmd_buffer->cur_cs = &cmd_buffer->cs;
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/* setup initial configuration into command buffer */
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if (cmd_buffer->level == VK_COMMAND_BUFFER_LEVEL_PRIMARY) {
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switch (cmd_buffer->queue_family_index) {
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case TU_QUEUE_GENERAL:
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/* init */
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tu6_init_hw(cmd_buffer);
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break;
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default:
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break;
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}
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}
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result = tu_cs_begin(cmd_buffer->device, &cmd_buffer->cs, 4096);
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if (result != VK_SUCCESS)
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return result;
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cmd_buffer->status = TU_CMD_BUFFER_STATUS_RECORDING;
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/* Put some stuff in so we do not have empty command buffers. */
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tu_cs_emit_pkt7(&cmd_buffer->cs, CP_NOP, 4);
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tu_cs_emit(&cmd_buffer->cs, 0);
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tu_cs_emit(&cmd_buffer->cs, 0);
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tu_cs_emit(&cmd_buffer->cs, 0);
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tu_cs_emit(&cmd_buffer->cs, 0);
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return VK_SUCCESS;
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}
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@ -545,6 +756,11 @@ tu_EndCommandBuffer(VkCommandBuffer commandBuffer)
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{
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TU_FROM_HANDLE(tu_cmd_buffer, cmd_buffer, commandBuffer);
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if (cmd_buffer->scratch_seqno) {
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tu_bo_list_add(&cmd_buffer->bo_list, &cmd_buffer->scratch_bo,
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MSM_SUBMIT_BO_WRITE);
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}
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VkResult result = tu_cs_end(&cmd_buffer->cs);
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if (result != VK_SUCCESS)
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cmd_buffer->record_result = result;
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@ -784,10 +784,19 @@ struct tu_cmd_buffer
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struct tu_cmd_buffer_upload upload;
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VkResult record_result;
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struct tu_bo_list bo_list;
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struct tu_cs cs;
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VkResult record_result;
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uint16_t marker_reg;
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uint32_t marker_seqno;
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struct tu_bo scratch_bo;
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uint32_t scratch_seqno;
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/* current cs; command packets are always emitted to it */
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struct tu_cs *cur_cs;
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};
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bool
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