i965/icl: Add assertions to check dispatch mode is SIMD8
SIMD4x2 dispatch mode has been removed in GEN11. We're not using it anyways in Mesa. Adding few asserts to make it explicit. Use GEN_GEN macro in place of devinfo->gen (Ken) Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
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@ -572,6 +572,8 @@ blorp_emit_vs_config(struct blorp_batch *batch,
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const struct blorp_params *params)
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{
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struct brw_vs_prog_data *vs_prog_data = params->vs_prog_data;
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assert(!vs_prog_data || GEN_GEN < 11 ||
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vs_prog_data->base.dispatch_mode == DISPATCH_MODE_SIMD8);
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blorp_emit(batch, GENX(3DSTATE_VS), vs) {
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if (vs_prog_data) {
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@ -2050,6 +2050,8 @@ genX(upload_vs_state)(struct brw_context *brw)
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assert(vue_prog_data->dispatch_mode == DISPATCH_MODE_SIMD8 ||
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vue_prog_data->dispatch_mode == DISPATCH_MODE_4X2_DUAL_OBJECT);
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assert(GEN_GEN < 11 ||
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vue_prog_data->dispatch_mode == DISPATCH_MODE_SIMD8);
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#if GEN_GEN == 6
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/* From the BSpec, 3D Pipeline > Geometry > Vertex Shader > State,
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@ -3967,6 +3969,9 @@ genX(upload_ds_state)(struct brw_context *brw)
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if (!tes_prog_data) {
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brw_batch_emit(brw, GENX(3DSTATE_DS), ds);
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} else {
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assert(GEN_GEN < 11 ||
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vue_prog_data->dispatch_mode == DISPATCH_MODE_SIMD8);
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brw_batch_emit(brw, GENX(3DSTATE_DS), ds) {
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INIT_THREAD_DISPATCH_FIELDS(ds, Patch);
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