From 9bbd6162a9f2160b8682ba9b4db0e8680bdd4987 Mon Sep 17 00:00:00 2001 From: Tony Wasserka Date: Wed, 28 Oct 2020 13:35:06 +0100 Subject: [PATCH] aco/ra: Introduce PhysRegInterval helper class MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This mainly clarifies the semantics of register bounds (inclusive vs exclusive), and further groups related varaibles together to clarify sliding-window-style loops. Reviewed-by: Daniel Schürmann Part-of: --- src/amd/compiler/aco_register_allocation.cpp | 30 ++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/src/amd/compiler/aco_register_allocation.cpp b/src/amd/compiler/aco_register_allocation.cpp index 247219ee1c0..fc859e3f21e 100644 --- a/src/amd/compiler/aco_register_allocation.cpp +++ b/src/amd/compiler/aco_register_allocation.cpp @@ -92,6 +92,36 @@ struct ra_ctx { } }; +/* Half-open register interval used in "sliding window"-style for-loops */ +struct PhysRegInterval { + unsigned lo_; + unsigned size; + + /* Inclusive lower bound */ + unsigned lo() const { + return lo_; + } + + /* Exclusive upper bound */ + unsigned hi() const { + return lo() + size; + } + + PhysRegInterval& operator+=(uint32_t stride) { + lo_ += stride; + return *this; + } + + bool operator!=(const PhysRegInterval& oth) const { + return lo_ != oth.lo_ || size != oth.size; + } + + /* Construct a half-open interval, excluding the end register */ + static PhysRegInterval from_until(unsigned first, unsigned end) { + return { first, end - first }; + } +}; + struct DefInfo { uint16_t lb; uint16_t ub;