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freedreno/ir3: split up ssa_src 

Slight bit of refactoring that will be needed for indirect gpr
addressing (TEMP[ADDR[]]).

Signed-off-by: Rob Clark <robclark@freedesktop.org>
This commit is contained in:
Rob Clark 2014-12-30 20:00:40 -05:00
parent d15db9e7c0
commit 9bb865b3cf
1 changed files with 34 additions and 23 deletions
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57
src/gallium/drivers/freedreno/ir3/ir3_compiler.c
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@ -480,48 +480,59 @@ ssa_dst(struct ir3_compile_context *ctx, struct ir3_instruction *instr,
} }
} }
static void static struct ir3_instruction *
ssa_src(struct ir3_compile_context *ctx, struct ir3_register *reg, ssa_instr(struct ir3_compile_context *ctx, unsigned file, unsigned n)
const struct tgsi_src_register *src, unsigned chan)
{ {
struct ir3_block *block = ctx->block; struct ir3_block *block = ctx->block;
unsigned n = regid(src->Index, chan); struct ir3_instruction *instr = NULL;
switch (src->File) { switch (file) {
case TGSI_FILE_INPUT: case TGSI_FILE_INPUT:
reg->flags |= IR3_REG_SSA; instr = block_input(ctx->block, n);
reg->instr = block_input(ctx->block, n);
break; break;
case TGSI_FILE_OUTPUT: case TGSI_FILE_OUTPUT:
/* really this should just happen in case of 'MOV_SAT OUT[n], ..', /* really this should just happen in case of 'MOV_SAT OUT[n], ..',
* for the following clamp instructions: * for the following clamp instructions:
*/ */
reg->flags |= IR3_REG_SSA; instr = block->outputs[n];
reg->instr = block->outputs[n];
/* we don't have to worry about read from an OUTPUT that was /* we don't have to worry about read from an OUTPUT that was
* assigned outside of the current block, because the _SAT * assigned outside of the current block, because the _SAT
* clamp instructions will always be in the same block as * clamp instructions will always be in the same block as
* the original instruction which wrote the OUTPUT * the original instruction which wrote the OUTPUT
*/ */
compile_assert(ctx, reg->instr); compile_assert(ctx, instr);
break; break;
case TGSI_FILE_TEMPORARY: case TGSI_FILE_TEMPORARY:
reg->flags |= IR3_REG_SSA; instr = block_temporary(ctx->block, n);
reg->instr = block_temporary(ctx->block, n); if (!instr) {
/* this can happen when registers (or components of a TGSI
* register) are used as src before they have been assigned
* (undefined contents). To avoid confusing the rest of the
* compiler, and to generally keep things peachy, substitute
* an instruction that sets the src to 0.0. Or to keep
* things undefined, I could plug in a random number? :-P
*
* NOTE: *don't* use instr_create() here!
*/
instr = create_immed(ctx, 0.0);
}
break; break;
} }
if ((reg->flags & IR3_REG_SSA) && !reg->instr) { return instr;
/* this can happen when registers (or components of a TGSI }
* register) are used as src before they have been assigned
* (undefined contents). To avoid confusing the rest of the static void
* compiler, and to generally keep things peachy, substitute ssa_src(struct ir3_compile_context *ctx, struct ir3_register *reg,
* an instruction that sets the src to 0.0. Or to keep const struct tgsi_src_register *src, unsigned chan)
* things undefined, I could plug in a random number? :-P {
* struct ir3_instruction *instr;
* NOTE: *don't* use instr_create() here!
*/ instr = ssa_instr(ctx, src->File, regid(src->Index, chan));
reg->instr = create_immed(ctx, 0.0);
if (instr) {
reg->flags |= IR3_REG_SSA;
reg->instr = instr;
} }
} }