pan/bi: Support dual texture scheduling
Teach the scheduler about dual texturing to avoid an artifical "must not last" constraint causing suboptimal scheduling like clause_1: ds(0) nbb tex ncph dwb(0) { *NOP t0 +TEXC.skip t1, r0, r1, 0xf1e00144, @r4 *NOP t0 +NOP t1 } Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13723>
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@ -524,12 +524,17 @@ bi_can_add(bi_instr *ins)
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* pseudoinstructions writing multiple destinations (expanding to multiple
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* paired instructions) can run afoul of the "no two writes on the last clause"
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* constraint, so we check for that here.
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*
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* Exception to the exception: TEXC, which writes to multiple sets of staging
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* registers. Staging registers bypass the usual register write mechanism so
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* this restriction does not apply.
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*/
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static bool
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bi_must_not_last(bi_instr *ins)
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{
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return !bi_is_null(ins->dest[0]) && !bi_is_null(ins->dest[1]);
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return !bi_is_null(ins->dest[0]) && !bi_is_null(ins->dest[1]) &&
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(ins->op != BI_OPCODE_TEXC);
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}
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/* Check for a message-passing instruction. +DISCARD.f32 is special-cased; we
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