intel/compiler: implement primitive shading rate for mesh
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16030>
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@ -1799,16 +1799,22 @@ calculate_urb_setup(const struct intel_device_info *devinfo,
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uint64_t per_prim_inputs_read =
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nir->info.inputs_read & nir->info.per_primitive_inputs;
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/* In Mesh, VIEWPORT and LAYER slots are always at the beginning,
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* because they come from MUE Primitive Header, not Per-Primitive Attributes.
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/* In Mesh, PRIMITIVE_SHADING_RATE, VIEWPORT and LAYER slots
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* are always at the beginning, because they come from MUE
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* Primitive Header, not Per-Primitive Attributes.
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*/
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const uint64_t primitive_header_bits = VARYING_BIT_VIEWPORT |
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VARYING_BIT_LAYER;
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VARYING_BIT_LAYER |
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VARYING_BIT_PRIMITIVE_SHADING_RATE;
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if (per_prim_inputs_read & primitive_header_bits) {
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/* Layer and Viewport live in the same 4-dwords slot (layer
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* is dword 1, and viewport is dword 2).
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/* Primitive Shading Rate, Layer and Viewport live in the same
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* 4-dwords slot (psr is dword 0, layer is dword 1, and viewport
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* is dword 2).
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*/
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if (per_prim_inputs_read & VARYING_BIT_PRIMITIVE_SHADING_RATE)
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prog_data->urb_setup[VARYING_SLOT_PRIMITIVE_SHADING_RATE] = 0;
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if (per_prim_inputs_read & VARYING_BIT_LAYER)
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prog_data->urb_setup[VARYING_SLOT_LAYER] = 0;
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@ -362,6 +362,7 @@ brw_compute_mue_map(struct nir_shader *nir, struct brw_mue_map *map)
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map->per_primitive_header_size_dw =
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(nir->info.outputs_written & (BITFIELD64_BIT(VARYING_SLOT_VIEWPORT) |
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BITFIELD64_BIT(VARYING_SLOT_CULL_PRIMITIVE) |
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BITFIELD64_BIT(VARYING_SLOT_PRIMITIVE_SHADING_RATE) |
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BITFIELD64_BIT(VARYING_SLOT_LAYER))) ? 8 : 0;
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map->per_primitive_start_dw = ALIGN(primitive_list_size_dw, 8);
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@ -372,6 +373,9 @@ brw_compute_mue_map(struct nir_shader *nir, struct brw_mue_map *map)
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unsigned start;
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switch (location) {
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case VARYING_SLOT_PRIMITIVE_SHADING_RATE:
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start = map->per_primitive_start_dw + 0;
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break;
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case VARYING_SLOT_LAYER:
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start = map->per_primitive_start_dw + 1; /* RTAIndex */
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break;
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@ -508,6 +512,8 @@ brw_nir_lower_mue_outputs(nir_shader *nir, const struct brw_mue_map *map)
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nir_lower_io(nir, nir_var_shader_out, type_size_scalar_dwords,
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nir_lower_io_lower_64bit_to_32);
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brw_nir_lower_shading_rate_output(nir);
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}
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static void
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@ -54,17 +54,24 @@ lower_shading_rate_output_instr(nir_builder *b, nir_instr *instr,
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return false;
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nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
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if (intrin->intrinsic != nir_intrinsic_load_output &&
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intrin->intrinsic != nir_intrinsic_store_output)
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nir_intrinsic_op op = intrin->intrinsic;
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if (op != nir_intrinsic_load_output &&
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op != nir_intrinsic_store_output &&
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op != nir_intrinsic_load_per_primitive_output &&
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op != nir_intrinsic_store_per_primitive_output)
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return false;
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if (nir_intrinsic_base(intrin) != VARYING_SLOT_PRIMITIVE_SHADING_RATE)
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struct nir_io_semantics io = nir_intrinsic_io_semantics(intrin);
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if (io.location != VARYING_SLOT_PRIMITIVE_SHADING_RATE)
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return false;
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b->cursor = intrin->intrinsic == nir_intrinsic_load_output ?
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nir_after_instr(instr) : nir_before_instr(instr);
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bool is_store = op == nir_intrinsic_store_output ||
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op == nir_intrinsic_store_per_primitive_output;
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if (intrin->intrinsic == nir_intrinsic_store_output) {
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b->cursor = is_store ? nir_before_instr(instr) : nir_after_instr(instr);
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if (is_store) {
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assert(intrin->src[0].is_ssa);
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nir_ssa_def *bit_field = intrin->src[0].ssa;
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nir_ssa_def *fp16_x =
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@ -80,7 +87,6 @@ lower_shading_rate_output_instr(nir_builder *b, nir_instr *instr,
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nir_instr_rewrite_src(instr, &intrin->src[0],
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nir_src_for_ssa(packed_fp16_xy));
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} else {
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assert(intrin->intrinsic == nir_intrinsic_load_output);
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nir_ssa_def *packed_fp16_xy = &intrin->dest.ssa;
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nir_ssa_def *u32_x =
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@ -102,9 +108,6 @@ lower_shading_rate_output_instr(nir_builder *b, nir_instr *instr,
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bool
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brw_nir_lower_shading_rate_output(nir_shader *nir)
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{
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/* TODO(mesh): Add Shading Rate support. */
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assert(nir->info.stage != MESA_SHADER_MESH);
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return nir_shader_instructions_pass(nir, lower_shading_rate_output_instr,
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nir_metadata_block_index |
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nir_metadata_dominance, NULL);
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