From 99aed688d346e26b23e2e00cb6f7df9be3415ccb Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Timur=20Krist=C3=B3f?= Date: Thu, 17 Oct 2019 17:14:37 +0200 Subject: [PATCH] aco/gfx10: Add notes about some GFX10 hazards. MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit ACO currently mitigates VMEMtoScalarWriteHazard and Offset3fBug (names from LLVM). There are some bugs that ACO needn't care about. Just to be on the safe side, add an assertion that makes sure that we aren't hit by FlatSegmentOffsetBug. Signed-off-by: Timur Kristóf Reviewed-by: Daniel Schürmann --- src/amd/compiler/README | 33 ++++++++++++++++++++++++++++++ src/amd/compiler/aco_assembler.cpp | 6 ++++-- 2 files changed, 37 insertions(+), 2 deletions(-) diff --git a/src/amd/compiler/README b/src/amd/compiler/README index 16e7daee3e4..630f1fcd42a 100644 --- a/src/amd/compiler/README +++ b/src/amd/compiler/README @@ -140,3 +140,36 @@ by an `s_buffer_store` with the same address. Inserting an `s_nop` between them does not mitigate the issue, so an `s_waitcnt lgkmcnt(0)` must be inserted. This is not mentioned by LLVM among the other GFX10 bugs, but LLVM doesn't use SMEM stores, so it's not surprising that they didn't notice it. + +### VMEMtoScalarWriteHazard + +Triggered by: +VMEM/FLAT/GLOBAL/SCRATCH/DS instruction reads an SGPR (or EXEC, or M0). +Then, a SALU/SMEM instruction writes the same SGPR. + +Mitigated by: +A VALU instruction or an `s_waitcnt vmcnt(0)` between the two instructions. + +### Offset3fBug + +Any branch that is located at offset 0x3f will be buggy. Just insert some NOPs to make sure no branch +is located at this offset. + +### InstFwdPrefetchBug + +According to LLVM, the `s_inst_prefetch` instruction can cause a hang. +There are no further details. + +### LdsMisalignedBug + +When there is a misaligned multi-dword FLAT load/store instruction in WGP mode, +it needs to be split into multiple single-dword FLAT instructions. + +ACO doesn't use FLAT load/store on GFX10, so is unaffected. + +### FlatSegmentOffsetBug + +The 12-bit immediate OFFSET field of FLAT instructions must always be 0. +GLOBAL and SCRATCH are unaffected. + +ACO doesn't use FLAT load/store on GFX10, so is unaffected. diff --git a/src/amd/compiler/aco_assembler.cpp b/src/amd/compiler/aco_assembler.cpp index ea7295816db..08debb25ad6 100644 --- a/src/amd/compiler/aco_assembler.cpp +++ b/src/amd/compiler/aco_assembler.cpp @@ -399,8 +399,10 @@ void emit_instruction(asm_context& ctx, std::vector& out, Instruction* assert(flat->offset <= 0x1fff); encoding |= flat->offset & 0x1fff; } else { - assert(flat->offset <= 0x0fff); - encoding |= flat->offset & 0x0fff; + /* GFX10 has a 12-bit immediate OFFSET field, + * but it has a hw bug: it ignores the offset, called FlatSegmentOffsetBug + */ + assert(flat->offset == 0); } if (instr->format == Format::SCRATCH) encoding |= 1 << 14;