i965/fs: Implement HSW BFI exec size workarounds in the SIMD lowering pass.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
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@ -4745,8 +4745,6 @@ get_lowered_simd_width(const struct brw_device_info *devinfo,
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case BRW_OPCODE_F16TO32:
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case BRW_OPCODE_BFREV:
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case BRW_OPCODE_BFE:
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case BRW_OPCODE_BFI1:
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case BRW_OPCODE_BFI2:
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case BRW_OPCODE_ADD:
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case BRW_OPCODE_MUL:
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case BRW_OPCODE_AVG:
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@ -4781,6 +4779,14 @@ get_lowered_simd_width(const struct brw_device_info *devinfo,
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!inst->dst.is_null() ? 8 : ~0);
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return MIN2(max_width, get_fpu_lowered_simd_width(devinfo, inst));
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}
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case BRW_OPCODE_BFI1:
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case BRW_OPCODE_BFI2:
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/* The Haswell WaForceSIMD8ForBFIInstruction workaround says that we
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* should
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* "Force BFI instructions to be executed always in SIMD8."
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*/
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return MIN2(devinfo->is_haswell ? 8 : ~0u,
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get_fpu_lowered_simd_width(devinfo, inst));
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case SHADER_OPCODE_RCP:
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case SHADER_OPCODE_RSQ:
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