vc4: Switch QPU_PACK_SCALED to be two non-SSA instructions.
total instructions in shared programs: 98159 -> 98136 (-0.02%) instructions in affected programs: 12279 -> 12256 (-0.19%)
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69ef08d303
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98728ce071
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@ -1142,7 +1142,10 @@ emit_scaled_viewport_write(struct vc4_compile *c, struct qreg rcp_w)
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rcp_w));
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}
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qir_VPM_WRITE(c, qir_PACK_SCALED(c, xyi[0], xyi[1]));
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struct qreg packed = qir_get_temp(c);
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qir_PACK_16A_I(c, packed, xyi[0]);
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qir_PACK_16B_I(c, packed, xyi[1]);
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qir_VPM_WRITE(c, packed);
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}
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static void
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@ -76,7 +76,8 @@ static const struct qir_op_info qir_op_info[] = {
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[QOP_PACK_8B_F] = { "pack_8b_f", 1, 1 },
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[QOP_PACK_8C_F] = { "pack_8c_f", 1, 1 },
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[QOP_PACK_8D_F] = { "pack_8d_f", 1, 1 },
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[QOP_PACK_SCALED] = { "pack_scaled", 1, 2, false, true },
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[QOP_PACK_16A_I] = { "pack_16a_i", 1, 1 },
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[QOP_PACK_16B_I] = { "pack_16b_i", 1, 1 },
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[QOP_TLB_DISCARD_SETUP] = { "discard", 0, 1, true },
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[QOP_TLB_STENCIL_SETUP] = { "tlb_stencil_setup", 0, 1, true },
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[QOP_TLB_Z_WRITE] = { "tlb_z", 0, 1, true },
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@ -104,12 +104,13 @@ enum qop {
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QOP_LOG2,
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QOP_VW_SETUP,
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QOP_VR_SETUP,
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QOP_PACK_SCALED,
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QOP_PACK_8888_F,
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QOP_PACK_8A_F,
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QOP_PACK_8B_F,
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QOP_PACK_8C_F,
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QOP_PACK_8D_F,
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QOP_PACK_16A_I,
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QOP_PACK_16B_I,
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QOP_TLB_DISCARD_SETUP,
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QOP_TLB_STENCIL_SETUP,
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QOP_TLB_Z_WRITE,
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@ -580,12 +581,13 @@ QIR_ALU1(RCP)
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QIR_ALU1(RSQ)
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QIR_ALU1(EXP2)
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QIR_ALU1(LOG2)
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QIR_ALU2(PACK_SCALED)
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QIR_ALU1(PACK_8888_F)
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QIR_PACK(PACK_8A_F)
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QIR_PACK(PACK_8B_F)
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QIR_PACK(PACK_8C_F)
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QIR_PACK(PACK_8D_F)
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QIR_PACK(PACK_16A_I)
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QIR_PACK(PACK_16B_I)
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QIR_ALU1(VARY_ADD_C)
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QIR_NODST_2(TEX_S)
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QIR_NODST_2(TEX_T)
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@ -403,23 +403,14 @@ vc4_generate_code(struct vc4_context *vc4, struct vc4_compile *c)
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queue(c, qpu_a_FADD(dst, src[0], qpu_r5()));
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break;
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case QOP_PACK_SCALED: {
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uint64_t a = (qpu_a_MOV(dst, src[0]) |
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QPU_SET_FIELD(QPU_PACK_A_16A,
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QPU_PACK));
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uint64_t b = (qpu_a_MOV(dst, src[1]) |
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QPU_SET_FIELD(QPU_PACK_A_16B,
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QPU_PACK));
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if (dst.mux == src[1].mux && dst.addr == src[1].addr) {
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queue(c, b);
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queue(c, a);
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} else {
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queue(c, a);
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queue(c, b);
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}
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case QOP_PACK_16A_I:
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case QOP_PACK_16B_I:
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queue(c,
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qpu_a_MOV(dst, src[0]) |
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QPU_SET_FIELD(qinst->op == QOP_PACK_16A_I ?
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QPU_PACK_A_16A : QPU_PACK_A_16B,
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QPU_PACK));
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break;
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}
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case QOP_TEX_S:
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case QOP_TEX_T:
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@ -268,7 +268,8 @@ vc4_register_allocate(struct vc4_context *vc4, struct vc4_compile *c)
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AB_INDEX + QPU_R_FRAG_PAYLOAD_ZW * 2);
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break;
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case QOP_PACK_SCALED:
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case QOP_PACK_16A_I:
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case QOP_PACK_16B_I:
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/* The pack flags require an A-file dst register. */
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class_bits[inst->dst.index] &= CLASS_BIT_A;
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break;
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