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winsys/amdgpu: initial SI support 

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
This commit is contained in:
Ronie Salgado 2016-02-11 06:17:33 -03:00 committed by Marek Olšák
parent 971ef7518f
commit 97b55243fb
3 changed files with 46 additions and 6 deletions
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18
src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
View File

@ -980,13 +980,23 @@ static int amdgpu_cs_flush(struct radeon_winsys_cs *rcs,
switch (cs->ring_type) {
case RING_DMA:
/* pad DMA ring to 8 DWs */
while (rcs->current.cdw & 7)
OUT_CS(rcs, 0x00000000); /* NOP packet */
if (ws->info.chip_class <= SI) {
while (rcs->current.cdw & 7)
OUT_CS(rcs, 0xf0000000); /* NOP packet */
} else {
while (rcs->current.cdw & 7)
OUT_CS(rcs, 0x00000000); /* NOP packet */
}
break;
case RING_GFX:
/* pad GFX ring to 8 DWs to meet CP fetch alignment requirements */
while (rcs->current.cdw & 7)
OUT_CS(rcs, 0xffff1000); /* type3 nop packet */
if (ws->info.gfx_ib_pad_with_type2) {
while (rcs->current.cdw & 7)
OUT_CS(rcs, 0x80000000); /* type2 nop packet */
} else {
while (rcs->current.cdw & 7)
OUT_CS(rcs, 0xffff1000); /* type3 nop packet */
}
/* Also pad the const IB. */
if (cs->const_ib.ib_mapped)

9
src/gallium/winsys/amdgpu/drm/amdgpu_surface.c
View File

@ -126,8 +126,13 @@ ADDR_HANDLE amdgpu_addr_create(struct amdgpu_winsys *ws)
regValue.backendDisables = ws->amdinfo.backend_disable[0];
regValue.pTileConfig = ws->amdinfo.gb_tile_mode;
regValue.noOfEntries = ARRAY_SIZE(ws->amdinfo.gb_tile_mode);
regValue.pMacroTileConfig = ws->amdinfo.gb_macro_tile_mode;
regValue.noOfMacroEntries = ARRAY_SIZE(ws->amdinfo.gb_macro_tile_mode);
if (ws->info.chip_class == SI) {
regValue.pMacroTileConfig = NULL;
regValue.noOfMacroEntries = 0;
} else {
regValue.pMacroTileConfig = ws->amdinfo.gb_macro_tile_mode;
regValue.noOfMacroEntries = ARRAY_SIZE(ws->amdinfo.gb_macro_tile_mode);
}
createFlags.value = 0;
createFlags.useTileIndex = 1;

25
src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c
View File

@ -215,6 +215,8 @@ static bool do_winsys_init(struct amdgpu_winsys *ws, int fd)
ws->info.chip_class = VI;
else if (ws->info.family >= CHIP_BONAIRE)
ws->info.chip_class = CIK;
else if (ws->info.family >= CHIP_TAHITI)
ws->info.chip_class = SI;
else {
fprintf(stderr, "amdgpu: Unknown family.\n");
goto fail;
@ -230,6 +232,26 @@ static bool do_winsys_init(struct amdgpu_winsys *ws, int fd)
/* family and rev_id are for addrlib */
switch (ws->info.family) {
case CHIP_TAHITI:
ws->family = FAMILY_SI;
ws->rev_id = SI_TAHITI_P_A0;
break;
case CHIP_PITCAIRN:
ws->family = FAMILY_SI;
ws->rev_id = SI_PITCAIRN_PM_A0;
break;
case CHIP_VERDE:
ws->family = FAMILY_SI;
ws->rev_id = SI_CAPEVERDE_M_A0;
break;
case CHIP_OLAND:
ws->family = FAMILY_SI;
ws->rev_id = SI_OLAND_M_A0;
break;
case CHIP_HAINAN:
ws->family = FAMILY_SI;
ws->rev_id = SI_HAINAN_V_A0;
break;
case CHIP_BONAIRE:
ws->family = FAMILY_CI;
ws->rev_id = CI_BONAIRE_M_A0;
@ -331,6 +353,9 @@ static bool do_winsys_init(struct amdgpu_winsys *ws, int fd)
ws->info.gart_page_size = alignment_info.size_remote;
if (ws->info.chip_class == SI)
ws->info.gfx_ib_pad_with_type2 = TRUE;
ws->check_vm = strstr(debug_get_option("R600_DEBUG", ""), "check_vm") != NULL;
return true;