pan/bi: Augment ST_TILE with register format
To model its Valhall incarnation. Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15223>
This commit is contained in:
parent
c7f6b973b2
commit
97a13d6424
|
@ -7709,6 +7709,12 @@
|
||||||
<opt>v3</opt>
|
<opt>v3</opt>
|
||||||
<opt>v4</opt>
|
<opt>v4</opt>
|
||||||
</mod>
|
</mod>
|
||||||
|
<mod name="register_format" size="3" pseudo="true">
|
||||||
|
<opt>f32</opt>
|
||||||
|
<opt>f16</opt>
|
||||||
|
<opt>u32</opt>
|
||||||
|
<opt>s32</opt>
|
||||||
|
</mod>
|
||||||
</ins>
|
</ins>
|
||||||
|
|
||||||
<ins name="+SWZ.v2i16" mask="0xfffc8" exact="0x3d948">
|
<ins name="+SWZ.v2i16" mask="0xfffc8" exact="0x3d948">
|
||||||
|
|
|
@ -523,7 +523,8 @@ bi_emit_blend_op(bi_builder *b, bi_index rgba, nir_alu_type T,
|
||||||
/* Conversion descriptor comes from the compile inputs, pixel
|
/* Conversion descriptor comes from the compile inputs, pixel
|
||||||
* indices derived at run time based on sample ID */
|
* indices derived at run time based on sample ID */
|
||||||
bi_st_tile(b, rgba, bi_pixel_indices(b, rt), bi_register(60),
|
bi_st_tile(b, rgba, bi_pixel_indices(b, rt), bi_register(60),
|
||||||
bi_imm_u32(blend_desc >> 32), BI_VECSIZE_V4);
|
bi_imm_u32(blend_desc >> 32),
|
||||||
|
regfmt, BI_VECSIZE_V4);
|
||||||
} else if (b->shader->inputs->is_blend) {
|
} else if (b->shader->inputs->is_blend) {
|
||||||
/* Blend descriptor comes from the compile inputs */
|
/* Blend descriptor comes from the compile inputs */
|
||||||
/* Put the result in r0 */
|
/* Put the result in r0 */
|
||||||
|
|
Loading…
Reference in New Issue