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pan/bi: Augment ST_TILE with register format 

To model its Valhall incarnation.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15223>
This commit is contained in:
Alyssa Rosenzweig 2022-03-23 17:20:33 -04:00 committed by Marge Bot
parent c7f6b973b2
commit 97a13d6424
2 changed files with 8 additions and 1 deletions
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6
src/panfrost/bifrost/ISA.xml
View File

@ -7709,6 +7709,12 @@
<opt>v3</opt>
<opt>v4</opt>
</mod>
<mod name="register_format" size="3" pseudo="true">
<opt>f32</opt>
<opt>f16</opt>
<opt>u32</opt>
<opt>s32</opt>
</mod>
</ins>
<ins name="+SWZ.v2i16" mask="0xfffc8" exact="0x3d948">

3
src/panfrost/bifrost/bifrost_compile.c
View File

@ -523,7 +523,8 @@ bi_emit_blend_op(bi_builder *b, bi_index rgba, nir_alu_type T,
/* Conversion descriptor comes from the compile inputs, pixel
* indices derived at run time based on sample ID */
bi_st_tile(b, rgba, bi_pixel_indices(b, rt), bi_register(60),
bi_imm_u32(blend_desc >> 32), BI_VECSIZE_V4);
bi_imm_u32(blend_desc >> 32),
regfmt, BI_VECSIZE_V4);
} else if (b->shader->inputs->is_blend) {
/* Blend descriptor comes from the compile inputs */
/* Put the result in r0 */