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panfrost: Use VTX tag for vertex texturing 

Fixes BARRIER faults.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5284>
This commit is contained in:
Alyssa Rosenzweig 2020-05-21 13:23:46 -04:00 committed by Marge Bot
parent 89a9cc7645
commit 975238dc2a
1 changed files with 5 additions and 3 deletions
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8
src/panfrost/midgard/midgard_schedule.c
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@ -821,7 +821,8 @@ mir_schedule_condition(compiler_context *ctx,
static midgard_bundle
mir_schedule_texture(
midgard_instruction **instructions,
BITSET_WORD *worklist, unsigned len)
BITSET_WORD *worklist, unsigned len,
bool is_vertex)
{
struct midgard_predicate predicate = {
.tag = TAG_TEXTURE_4,
@ -836,7 +837,8 @@ mir_schedule_texture(
struct midgard_bundle out = {
.tag = ins->texture.op == TEXTURE_OP_BARRIER ?
TAG_TEXTURE_4_BARRIER : TAG_TEXTURE_4,
TAG_TEXTURE_4_BARRIER : is_vertex ?
TAG_TEXTURE_4_VTX : TAG_TEXTURE_4,
.instruction_count = 1,
.instructions = { ins }
};
@ -1151,7 +1153,7 @@ schedule_block(compiler_context *ctx, midgard_block *block)
midgard_bundle bundle;
if (tag == TAG_TEXTURE_4)
bundle = mir_schedule_texture(instructions, worklist, len);
bundle = mir_schedule_texture(instructions, worklist, len, ctx->stage != MESA_SHADER_FRAGMENT);
else if (tag == TAG_LOAD_STORE_4)
bundle = mir_schedule_ldst(instructions, worklist, len);
else if (tag == TAG_ALU_4)