svga: fix depth and coverage mask output declaration
Set the component mask to zero for both registers. Reviewed-by: Brian Paul <brianp@vmware.com>
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@ -2122,7 +2122,9 @@ emit_decl_instruction(struct svga_shader_emitter_v10 *emit,
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unsigned index, unsigned size)
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{
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assert(opcode0.opcodeType);
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assert(operand0.mask);
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assert(operand0.mask ||
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(operand0.operandType == VGPU10_OPERAND_TYPE_OUTPUT_DEPTH) ||
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(operand0.operandType == VGPU10_OPERAND_TYPE_OUTPUT_COVERAGE_MASK));
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begin_emit_instruction(emit);
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emit_dword(emit, opcode0.value);
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@ -2293,7 +2295,7 @@ emit_fragdepth_output_declaration(struct svga_shader_emitter_v10 *emit)
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operand0.operandType = VGPU10_OPERAND_TYPE_OUTPUT_DEPTH;
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operand0.numComponents = VGPU10_OPERAND_1_COMPONENT;
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operand0.indexDimension = VGPU10_OPERAND_INDEX_0D;
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operand0.mask = VGPU10_OPERAND_4_COMPONENT_MASK_ALL;
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operand0.mask = 0;
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emit_decl_instruction(emit, opcode0, operand0, name_token, 0, 1);
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}
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@ -2318,7 +2320,7 @@ emit_samplemask_output_declaration(struct svga_shader_emitter_v10 *emit)
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operand0.operandType = VGPU10_OPERAND_TYPE_OUTPUT_COVERAGE_MASK;
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operand0.numComponents = VGPU10_OPERAND_0_COMPONENT;
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operand0.indexDimension = VGPU10_OPERAND_INDEX_0D;
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operand0.mask = VGPU10_OPERAND_4_COMPONENT_MASK_ALL;
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operand0.mask = 0;
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emit_decl_instruction(emit, opcode0, operand0, name_token, 0, 1);
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}
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