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radv: fix random depth range unrestricted failures due to a cache issue 

The shader module name is used to compute the pipeline key. The
driver used to load the wrong pipelines because the shader names
were similar.

This should fix random failures of
dEQP-VK.pipeline.depth_range_unrestricted.*

Fixes: f11ea22666 ("radv: fix a performance regression with graphics depth/stencil clears")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4216>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4216>
This commit is contained in:
Samuel Pitoiset 2020-03-17 15:32:45 +01:00 committed by Marge Bot
parent a6625b15a4
commit 94e37859a9
1 changed files with 6 additions and 2 deletions
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8
src/amd/vulkan/radv_meta_clear.c
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@ -512,8 +512,12 @@ build_depthstencil_shader(struct nir_shader **out_vs,
nir_builder_init_simple_shader(&vs_b, NULL, MESA_SHADER_VERTEX, NULL);
nir_builder_init_simple_shader(&fs_b, NULL, MESA_SHADER_FRAGMENT, NULL);
vs_b.shader->info.name = ralloc_strdup(vs_b.shader, "meta_clear_depthstencil_vs");
fs_b.shader->info.name = ralloc_strdup(fs_b.shader, "meta_clear_depthstencil_fs");
vs_b.shader->info.name = ralloc_strdup(vs_b.shader,
unrestricted ? "meta_clear_depthstencil_unrestricted_vs"
: "meta_clear_depthstencil_vs");
fs_b.shader->info.name = ralloc_strdup(fs_b.shader,
unrestricted ? "meta_clear_depthstencil_unrestricted_fs"
: "meta_clear_depthstencil_fs");
const struct glsl_type *position_out_type = glsl_vec4_type();
nir_variable *vs_out_pos =