From 94d3b9389e0663e1e7746f6f6a48b5723b025320 Mon Sep 17 00:00:00 2001 From: Erik Faye-Lund Date: Wed, 19 Jun 2019 13:15:54 +0200 Subject: [PATCH] zink: tweak state handling Acked-by: Jordan Justen --- src/gallium/drivers/zink/zink_context.c | 14 ++++---- src/gallium/drivers/zink/zink_context.h | 3 ++ src/gallium/drivers/zink/zink_pipeline.h | 4 +-- src/gallium/drivers/zink/zink_state.c | 42 ++++++++++++++---------- src/gallium/drivers/zink/zink_state.h | 16 ++++++--- 5 files changed, 48 insertions(+), 31 deletions(-) diff --git a/src/gallium/drivers/zink/zink_context.c b/src/gallium/drivers/zink/zink_context.c index 6a9430c97a4..9bfb13d7ede 100644 --- a/src/gallium/drivers/zink/zink_context.c +++ b/src/gallium/drivers/zink/zink_context.c @@ -726,9 +726,9 @@ zink_bind_vertex_buffers(struct zink_cmdbuf *cmdbuf, struct zink_context *ctx) { VkBuffer buffers[PIPE_MAX_ATTRIBS]; VkDeviceSize buffer_offsets[PIPE_MAX_ATTRIBS]; - struct zink_vertex_elements_state *elems = ctx->gfx_pipeline_state.element_state; - for (unsigned i = 0; i < elems->num_bindings; i++) { - struct pipe_vertex_buffer *vb = ctx->buffers + elems->binding_map[i]; + const struct zink_vertex_elements_state *elems = ctx->element_state; + for (unsigned i = 0; i < elems->hw_state.num_bindings; i++) { + struct pipe_vertex_buffer *vb = ctx->buffers + ctx->element_state->binding_map[i]; assert(vb && vb->buffer.resource); struct zink_resource *res = zink_resource(vb->buffer.resource); buffers[i] = res->buffer; @@ -736,8 +736,10 @@ zink_bind_vertex_buffers(struct zink_cmdbuf *cmdbuf, struct zink_context *ctx) zink_cmdbuf_reference_resoure(cmdbuf, res); } - if (elems->num_bindings > 0) - vkCmdBindVertexBuffers(cmdbuf->cmdbuf, 0, elems->num_bindings, buffers, buffer_offsets); + if (elems->hw_state.num_bindings > 0) + vkCmdBindVertexBuffers(cmdbuf->cmdbuf, 0, + elems->hw_state.num_bindings, + buffers, buffer_offsets); } static void @@ -804,7 +806,7 @@ zink_draw_vbo(struct pipe_context *pctx, { struct zink_context *ctx = zink_context(pctx); struct zink_screen *screen = zink_screen(pctx->screen); - struct zink_rasterizer_state *rast_state = ctx->gfx_pipeline_state.rast_state; + struct zink_rasterizer_state *rast_state = ctx->rast_state; if (dinfo->mode >= PIPE_PRIM_QUADS || dinfo->mode == PIPE_PRIM_LINE_LOOP) { diff --git a/src/gallium/drivers/zink/zink_context.h b/src/gallium/drivers/zink/zink_context.h index ed5fe183f65..ea8a0559481 100644 --- a/src/gallium/drivers/zink/zink_context.h +++ b/src/gallium/drivers/zink/zink_context.h @@ -72,6 +72,9 @@ struct zink_context { struct pipe_constant_buffer ubos[PIPE_SHADER_TYPES][PIPE_MAX_CONSTANT_BUFFERS]; struct pipe_framebuffer_state fb_state; + struct zink_vertex_elements_state *element_state; + struct zink_rasterizer_state *rast_state; + struct zink_shader *gfx_stages[PIPE_SHADER_TYPES - 1]; struct zink_gfx_pipeline_state gfx_pipeline_state; struct hash_table *program_cache; diff --git a/src/gallium/drivers/zink/zink_pipeline.h b/src/gallium/drivers/zink/zink_pipeline.h index a2a627d4e7a..87747fce740 100644 --- a/src/gallium/drivers/zink/zink_pipeline.h +++ b/src/gallium/drivers/zink/zink_pipeline.h @@ -38,13 +38,13 @@ struct zink_vertex_elements_state; struct zink_gfx_pipeline_state { struct zink_render_pass *render_pass; - struct zink_vertex_elements_state *element_state; + struct zink_vertex_elements_hw_state *element_state; VkVertexInputBindingDescription bindings[PIPE_MAX_ATTRIBS]; // combination of element_state and stride uint32_t num_attachments; struct zink_blend_state *blend_state; - struct zink_rasterizer_state *rast_state; + struct zink_rasterizer_hw_state *rast_state; struct zink_depth_stencil_alpha_state *depth_stencil_alpha_state; diff --git a/src/gallium/drivers/zink/zink_state.c b/src/gallium/drivers/zink/zink_state.c index b26845e94df..814e1e29b6c 100644 --- a/src/gallium/drivers/zink/zink_state.c +++ b/src/gallium/drivers/zink/zink_state.c @@ -60,15 +60,15 @@ zink_create_vertex_elements_state(struct pipe_context *pctx, ves->bindings[binding].binding = binding; ves->bindings[binding].inputRate = VK_VERTEX_INPUT_RATE_VERTEX; - ves->attribs[i].binding = binding; - ves->attribs[i].location = i; // TODO: unsure - ves->attribs[i].format = zink_get_format(elem->src_format); - assert(ves->attribs[i].format != VK_FORMAT_UNDEFINED); - ves->attribs[i].offset = elem->src_offset; + ves->hw_state.attribs[i].binding = binding; + ves->hw_state.attribs[i].location = i; // TODO: unsure + ves->hw_state.attribs[i].format = zink_get_format(elem->src_format); + assert(ves->hw_state.attribs[i].format != VK_FORMAT_UNDEFINED); + ves->hw_state.attribs[i].offset = elem->src_offset; } - ves->num_bindings = num_bindings; - ves->num_attribs = num_elements; + ves->hw_state.num_bindings = num_bindings; + ves->hw_state.num_attribs = num_elements; return ves; } @@ -76,15 +76,18 @@ static void zink_bind_vertex_elements_state(struct pipe_context *pctx, void *cso) { - struct zink_gfx_pipeline_state *state = &zink_context(pctx)->gfx_pipeline_state; - state->element_state = cso; + struct zink_context *ctx = zink_context(pctx); + struct zink_gfx_pipeline_state *state = &ctx->gfx_pipeline_state; + ctx->element_state = cso; if (cso) { + state->element_state = &ctx->element_state->hw_state; struct zink_vertex_elements_state *ves = cso; - for (int i = 0; i < ves->num_bindings; ++i) { + for (int i = 0; i < state->element_state->num_bindings; ++i) { state->bindings[i].binding = ves->bindings[i].binding; state->bindings[i].inputRate = ves->bindings[i].inputRate; } - } + } else + state->element_state = NULL; } static void @@ -372,17 +375,18 @@ zink_create_rasterizer_state(struct pipe_context *pctx, state->base = *rs_state; assert(rs_state->depth_clip_far == rs_state->depth_clip_near); - state->depth_clamp = rs_state->depth_clip_near == 0; - state->rasterizer_discard = rs_state->rasterizer_discard; + state->hw_state.depth_clamp = rs_state->depth_clip_near == 0; + state->hw_state.rasterizer_discard = rs_state->rasterizer_discard; assert(rs_state->fill_front <= PIPE_POLYGON_MODE_POINT); if (rs_state->fill_back != rs_state->fill_front) debug_printf("BUG: vulkan doesn't support different front and back fill modes\n"); - state->polygon_mode = (VkPolygonMode)rs_state->fill_front; // same values - state->cull_mode = (VkCullModeFlags)rs_state->cull_face; // same bits + state->hw_state.polygon_mode = (VkPolygonMode)rs_state->fill_front; // same values + state->hw_state.cull_mode = (VkCullModeFlags)rs_state->cull_face; // same bits - state->front_face = rs_state->front_ccw ? VK_FRONT_FACE_COUNTER_CLOCKWISE - : VK_FRONT_FACE_CLOCKWISE; + state->hw_state.front_face = rs_state->front_ccw ? + VK_FRONT_FACE_COUNTER_CLOCKWISE : + VK_FRONT_FACE_CLOCKWISE; state->offset_point = rs_state->offset_point; state->offset_line = rs_state->offset_line; @@ -400,7 +404,9 @@ zink_create_rasterizer_state(struct pipe_context *pctx, static void zink_bind_rasterizer_state(struct pipe_context *pctx, void *cso) { - zink_context(pctx)->gfx_pipeline_state.rast_state = cso; + struct zink_context *ctx = zink_context(pctx); + ctx->rast_state = cso; + ctx->gfx_pipeline_state.rast_state = &ctx->rast_state->hw_state; } static void diff --git a/src/gallium/drivers/zink/zink_state.h b/src/gallium/drivers/zink/zink_state.h index dd85fc74921..53023ea32d5 100644 --- a/src/gallium/drivers/zink/zink_state.h +++ b/src/gallium/drivers/zink/zink_state.h @@ -28,28 +28,34 @@ #include "pipe/p_state.h" +struct zink_vertex_elements_hw_state { + VkVertexInputAttributeDescription attribs[PIPE_MAX_ATTRIBS]; + uint32_t num_bindings, num_attribs; +}; + struct zink_vertex_elements_state { struct { uint32_t binding; VkVertexInputRate inputRate; } bindings[PIPE_MAX_ATTRIBS]; - VkVertexInputAttributeDescription attribs[PIPE_MAX_ATTRIBS]; - uint32_t num_bindings, num_attribs; uint8_t binding_map[PIPE_MAX_ATTRIBS]; + struct zink_vertex_elements_hw_state hw_state; }; -struct zink_rasterizer_state { - struct pipe_rasterizer_state base; - +struct zink_rasterizer_hw_state { VkBool32 depth_clamp; VkBool32 rasterizer_discard; VkFrontFace front_face; VkPolygonMode polygon_mode; VkCullModeFlags cull_mode; +}; +struct zink_rasterizer_state { + struct pipe_rasterizer_state base; bool offset_point, offset_line, offset_tri; float offset_units, offset_clamp, offset_scale; float line_width; + struct zink_rasterizer_hw_state hw_state; }; struct zink_blend_state {