radeon/vcn/dec: add db_aligned_height to message buffer
This is required for Sienna Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Boyuan Zhang <boyuan.zhang@amd.com> Reviewed-by: James Zhu <James.Zhu@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5501>
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@ -824,6 +824,10 @@ static struct pb_buffer *rvcn_dec_message_decode(struct radeon_decoder *dec,
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dec->base.width > 32 && dec->stream_type == RDECODE_CODEC_VP9)
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dec->base.width > 32 && dec->stream_type == RDECODE_CODEC_VP9)
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? align(dec->base.width, 64)
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? align(dec->base.width, 64)
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: align(dec->base.width, 32);
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: align(dec->base.width, 32);
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if (((struct si_screen*)dec->screen)->info.family >= CHIP_SIENNA &&
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dec->stream_type == RDECODE_CODEC_VP9)
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decode->db_aligned_height = align(dec->base.height, 64);
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decode->db_surf_tile_config = 0;
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decode->db_surf_tile_config = 0;
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decode->dt_pitch = luma->surface.u.gfx9.surf_pitch * luma->surface.blk_w;
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decode->dt_pitch = luma->surface.u.gfx9.surf_pitch * luma->surface.blk_w;
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