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radeon/vcn/dec: add db_aligned_height to message buffer 

This is required for Sienna

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: James Zhu <James.Zhu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5501>
This commit is contained in:
Leo Liu 2020-06-11 19:27:57 -04:00
parent 384195b041
commit 946c5c6b75
1 changed files with 4 additions and 0 deletions
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4
src/gallium/drivers/radeon/radeon_vcn_dec.c
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@ -824,6 +824,10 @@ static struct pb_buffer *rvcn_dec_message_decode(struct radeon_decoder *dec,
dec->base.width > 32 && dec->stream_type == RDECODE_CODEC_VP9)
? align(dec->base.width, 64)
: align(dec->base.width, 32);
if (((struct si_screen*)dec->screen)->info.family >= CHIP_SIENNA &&
dec->stream_type == RDECODE_CODEC_VP9)
decode->db_aligned_height = align(dec->base.height, 64);
decode->db_surf_tile_config = 0;
decode->dt_pitch = luma->surface.u.gfx9.surf_pitch * luma->surface.blk_w;