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i965: Add back strict type assertions for MAD and LRP. 

Commit 526ffdfc03 relaxed the type
assertions in brw_alu3 to allow D/UD types (required by BFE and BFI2).
This lost us the strict type checking for MAD and LRP, which require
all four types to be float.

This patch adds a new ALU3F wrapper which checks these once again.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
This commit is contained in:
Kenneth Graunke 2013-06-13 14:55:18 -07:00
parent 4563dfe23a
commit 9321f3257f
1 changed files with 16 additions and 2 deletions
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18
src/mesa/drivers/dri/i965/brw_eu_emit.c
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@ -905,6 +905,20 @@ struct brw_instruction *brw_##OP(struct brw_compile *p, \
return brw_alu3(p, BRW_OPCODE_##OP, dest, src0, src1, src2); \
}
#define ALU3F(OP) \
struct brw_instruction *brw_##OP(struct brw_compile *p, \
struct brw_reg dest, \
struct brw_reg src0, \
struct brw_reg src1, \
struct brw_reg src2) \
{ \
assert(dest.type == BRW_REGISTER_TYPE_F); \
assert(src0.type == BRW_REGISTER_TYPE_F); \
assert(src1.type == BRW_REGISTER_TYPE_F); \
assert(src2.type == BRW_REGISTER_TYPE_F); \
return brw_alu3(p, BRW_OPCODE_##OP, dest, src0, src1, src2); \
}
/* Rounding operations (other than RNDD) require two instructions - the first
* stores a rounded value (possibly the wrong way) in the dest register, but
* also sets a per-channel "increment bit" in the flag register. A predicated
@ -955,8 +969,8 @@ ALU2(DP3)
ALU2(DP2)
ALU2(LINE)
ALU2(PLN)
ALU3(MAD)
ALU3(LRP)
ALU3F(MAD)
ALU3F(LRP)
ALU1(BFREV)
ALU3(BFE)
ALU2(BFI1)