r600g: start using drm minor version to enable things.
If the drm minor version is > 9 (i.e. whats in drm-next), we enable s3tc + texture tiling by default now. this changes R600_FORCE_TILING to R600_TILING which can be set to false to disable tiling on working drm. Signed-off-by: Dave Airlie <airlied@redhat.com>
This commit is contained in:
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ea4a19c392
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929be6eb95
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@ -503,9 +503,9 @@ static INLINE uint32_t r600_translate_colorformat(enum pipe_format format)
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}
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}
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}
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}
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static INLINE boolean r600_is_sampler_format_supported(enum pipe_format format)
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static INLINE boolean r600_is_sampler_format_supported(struct pipe_screen *screen, enum pipe_format format)
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{
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{
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return r600_translate_texformat(format, NULL, NULL, NULL) != ~0;
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return r600_translate_texformat(screen, format, NULL, NULL, NULL) != ~0;
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}
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}
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static INLINE boolean r600_is_colorbuffer_format_supported(enum pipe_format format)
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static INLINE boolean r600_is_colorbuffer_format_supported(enum pipe_format format)
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@ -376,7 +376,7 @@ static struct pipe_sampler_view *evergreen_create_sampler_view(struct pipe_conte
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swizzle[1] = state->swizzle_g;
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swizzle[1] = state->swizzle_g;
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swizzle[2] = state->swizzle_b;
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swizzle[2] = state->swizzle_b;
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swizzle[3] = state->swizzle_a;
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swizzle[3] = state->swizzle_a;
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format = r600_translate_texformat(state->format,
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format = r600_translate_texformat(ctx->screen, state->format,
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swizzle,
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swizzle,
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&word4, &yuv_format);
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&word4, &yuv_format);
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if (format == ~0) {
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if (format == ~0) {
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@ -114,6 +114,8 @@ enum radeon_family r600_get_family(struct radeon *rw);
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enum chip_class r600_get_family_class(struct radeon *radeon);
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enum chip_class r600_get_family_class(struct radeon *radeon);
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struct r600_tiling_info *r600_get_tiling_info(struct radeon *radeon);
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struct r600_tiling_info *r600_get_tiling_info(struct radeon *radeon);
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unsigned r600_get_clock_crystal_freq(struct radeon *radeon);
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unsigned r600_get_clock_crystal_freq(struct radeon *radeon);
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unsigned r600_get_minor_version(struct radeon *radeon);
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unsigned r600_get_num_backends(struct radeon *radeon);
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/* r600_bo.c */
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/* r600_bo.c */
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struct r600_bo;
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struct r600_bo;
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@ -430,7 +430,7 @@ static boolean r600_is_format_supported(struct pipe_screen* screen,
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return FALSE;
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return FALSE;
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if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
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if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
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r600_is_sampler_format_supported(format)) {
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r600_is_sampler_format_supported(screen, format)) {
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retval |= PIPE_BIND_SAMPLER_VIEW;
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retval |= PIPE_BIND_SAMPLER_VIEW;
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}
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}
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@ -227,7 +227,7 @@ int r600_conv_pipe_prim(unsigned pprim, unsigned *prim);
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/* r600_texture.c */
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/* r600_texture.c */
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void r600_init_screen_texture_functions(struct pipe_screen *screen);
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void r600_init_screen_texture_functions(struct pipe_screen *screen);
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void r600_init_surface_functions(struct r600_pipe_context *r600);
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void r600_init_surface_functions(struct r600_pipe_context *r600);
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uint32_t r600_translate_texformat(enum pipe_format format,
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uint32_t r600_translate_texformat(struct pipe_screen *screen, enum pipe_format format,
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const unsigned char *swizzle_view,
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const unsigned char *swizzle_view,
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uint32_t *word4_p, uint32_t *yuv_format_p);
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uint32_t *word4_p, uint32_t *yuv_format_p);
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unsigned r600_texture_get_offset(struct r600_resource_texture *rtex,
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unsigned r600_texture_get_offset(struct r600_resource_texture *rtex,
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@ -427,7 +427,7 @@ static struct pipe_sampler_view *r600_create_sampler_view(struct pipe_context *c
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swizzle[1] = state->swizzle_g;
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swizzle[1] = state->swizzle_g;
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swizzle[2] = state->swizzle_b;
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swizzle[2] = state->swizzle_b;
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swizzle[3] = state->swizzle_a;
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swizzle[3] = state->swizzle_a;
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format = r600_translate_texformat(state->format,
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format = r600_translate_texformat(ctx->screen, state->format,
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swizzle,
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swizzle,
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&word4, &yuv_format);
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&word4, &yuv_format);
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if (format == ~0) {
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if (format == ~0) {
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@ -498,9 +498,9 @@ static INLINE uint32_t r600_translate_colorformat(enum pipe_format format)
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}
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}
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}
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}
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static INLINE boolean r600_is_sampler_format_supported(enum pipe_format format)
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static INLINE boolean r600_is_sampler_format_supported(struct pipe_screen *screen, enum pipe_format format)
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{
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{
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return r600_translate_texformat(format, NULL, NULL, NULL) != ~0;
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return r600_translate_texformat(screen, format, NULL, NULL, NULL) != ~0;
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}
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}
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static INLINE boolean r600_is_colorbuffer_format_supported(enum pipe_format format)
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static INLINE boolean r600_is_colorbuffer_format_supported(enum pipe_format format)
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@ -413,8 +413,13 @@ struct pipe_resource *r600_texture_create(struct pipe_screen *screen,
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/* Would like some magic "get_bool_option_once" routine.
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/* Would like some magic "get_bool_option_once" routine.
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*/
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*/
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if (force_tiling == -1)
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if (force_tiling == -1) {
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force_tiling = debug_get_bool_option("R600_FORCE_TILING", FALSE);
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struct r600_screen *rscreen = (struct r600_screen *)screen;
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if (r600_get_minor_version(rscreen->radeon) >= 9)
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force_tiling = debug_get_bool_option("R600_TILING", TRUE);
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else
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force_tiling = debug_get_bool_option("R600_TILING", FALSE);
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}
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if (force_tiling && permit_hardware_blit(screen, templ)) {
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if (force_tiling && permit_hardware_blit(screen, templ)) {
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if (!(templ->flags & R600_RESOURCE_FLAG_TRANSFER) &&
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if (!(templ->flags & R600_RESOURCE_FLAG_TRANSFER) &&
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@ -804,7 +809,8 @@ static unsigned r600_get_swizzle_combined(const unsigned char *swizzle_format,
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}
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}
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/* texture format translate */
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/* texture format translate */
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uint32_t r600_translate_texformat(enum pipe_format format,
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uint32_t r600_translate_texformat(struct pipe_screen *screen,
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enum pipe_format format,
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const unsigned char *swizzle_view,
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const unsigned char *swizzle_view,
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uint32_t *word4_p, uint32_t *yuv_format_p)
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uint32_t *word4_p, uint32_t *yuv_format_p)
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{
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{
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@ -870,8 +876,13 @@ uint32_t r600_translate_texformat(enum pipe_format format,
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break;
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break;
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}
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}
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if (r600_enable_s3tc == -1)
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if (r600_enable_s3tc == -1) {
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struct r600_screen *rscreen = (struct r600_screen *)screen;
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if (r600_get_minor_version(rscreen->radeon) >= 9)
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r600_enable_s3tc = 1;
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else
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r600_enable_s3tc = debug_get_bool_option("R600_ENABLE_S3TC", FALSE);
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r600_enable_s3tc = debug_get_bool_option("R600_ENABLE_S3TC", FALSE);
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}
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if (desc->layout == UTIL_FORMAT_LAYOUT_RGTC) {
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if (desc->layout == UTIL_FORMAT_LAYOUT_RGTC) {
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if (!r600_enable_s3tc)
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if (!r600_enable_s3tc)
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@ -45,6 +45,10 @@
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#define RADEON_INFO_CLOCK_CRYSTAL_FREQ 0x9
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#define RADEON_INFO_CLOCK_CRYSTAL_FREQ 0x9
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#endif
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#endif
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#ifndef RADEON_INFO_NUM_BACKENDS
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#define RADEON_INFO_NUM_BACKENDS 0xa
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#endif
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enum radeon_family r600_get_family(struct radeon *r600)
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enum radeon_family r600_get_family(struct radeon *r600)
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{
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{
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return r600->family;
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return r600->family;
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@ -65,6 +69,17 @@ unsigned r600_get_clock_crystal_freq(struct radeon *radeon)
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return radeon->clock_crystal_freq;
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return radeon->clock_crystal_freq;
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}
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}
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unsigned r600_get_num_backends(struct radeon *radeon)
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{
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return radeon->num_backends;
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}
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unsigned r600_get_minor_version(struct radeon *radeon)
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{
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return radeon->minor_version;
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}
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static int radeon_get_device(struct radeon *radeon)
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static int radeon_get_device(struct radeon *radeon)
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{
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{
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struct drm_radeon_info info = {};
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struct drm_radeon_info info = {};
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@ -195,6 +210,26 @@ static int radeon_get_clock_crystal_freq(struct radeon *radeon)
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return 0;
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return 0;
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}
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}
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static int radeon_get_num_backends(struct radeon *radeon)
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{
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struct drm_radeon_info info;
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uint32_t num_backends;
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int r;
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radeon->device = 0;
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info.request = RADEON_INFO_NUM_BACKENDS;
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info.value = (uintptr_t)&num_backends;
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r = drmCommandWriteRead(radeon->fd, DRM_RADEON_INFO, &info,
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sizeof(struct drm_radeon_info));
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if (r)
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return r;
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radeon->num_backends = num_backends;
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return 0;
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}
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static int radeon_init_fence(struct radeon *radeon)
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static int radeon_init_fence(struct radeon *radeon)
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{
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{
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radeon->fence = 1;
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radeon->fence = 1;
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@ -211,6 +246,7 @@ static struct radeon *radeon_new(int fd, unsigned device)
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{
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{
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struct radeon *radeon;
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struct radeon *radeon;
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int r;
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int r;
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drmVersionPtr version;
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radeon = calloc(1, sizeof(*radeon));
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radeon = calloc(1, sizeof(*radeon));
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if (radeon == NULL) {
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if (radeon == NULL) {
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@ -219,13 +255,27 @@ static struct radeon *radeon_new(int fd, unsigned device)
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radeon->fd = fd;
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radeon->fd = fd;
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radeon->device = device;
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radeon->device = device;
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radeon->refcount = 1;
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radeon->refcount = 1;
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if (fd >= 0) {
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version = drmGetVersion(radeon->fd);
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if (version->version_major != 2) {
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fprintf(stderr, "%s: DRM version is %d.%d.%d but this driver is "
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"only compatible with 2.x.x\n", __FUNCTION__,
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version->version_major, version->version_minor,
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version->version_patchlevel);
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drmFreeVersion(version);
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exit(1);
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}
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radeon->minor_version = version->version_minor;
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drmFreeVersion(version);
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r = radeon_get_device(radeon);
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r = radeon_get_device(radeon);
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if (r) {
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if (r) {
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fprintf(stderr, "Failed to get device id\n");
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fprintf(stderr, "Failed to get device id\n");
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return radeon_decref(radeon);
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return radeon_decref(radeon);
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}
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}
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}
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radeon->family = radeon_family_from_device(radeon->device);
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radeon->family = radeon_family_from_device(radeon->device);
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if (radeon->family == CHIP_UNKNOWN) {
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if (radeon->family == CHIP_UNKNOWN) {
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fprintf(stderr, "Unknown chipset 0x%04X\n", radeon->device);
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fprintf(stderr, "Unknown chipset 0x%04X\n", radeon->device);
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@ -278,6 +328,9 @@ static struct radeon *radeon_new(int fd, unsigned device)
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/* get the GPU counter frequency, failure is non fatal */
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/* get the GPU counter frequency, failure is non fatal */
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radeon_get_clock_crystal_freq(radeon);
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radeon_get_clock_crystal_freq(radeon);
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if (radeon->minor_version >= 9)
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radeon_get_num_backends(radeon);
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radeon->bomgr = r600_bomgr_create(radeon, 1000000);
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radeon->bomgr = r600_bomgr_create(radeon, 1000000);
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if (radeon->bomgr == NULL) {
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if (radeon->bomgr == NULL) {
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return NULL;
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return NULL;
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@ -50,6 +50,8 @@ struct radeon {
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unsigned *cfence;
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unsigned *cfence;
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struct r600_bo *fence_bo;
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struct r600_bo *fence_bo;
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unsigned clock_crystal_freq;
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unsigned clock_crystal_freq;
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unsigned num_backends;
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unsigned minor_version;
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};
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};
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struct r600_reg {
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struct r600_reg {
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