r600g: start using drm minor version to enable things.

If the drm minor version is > 9 (i.e. whats in drm-next),
we enable s3tc + texture tiling by default now.

this changes R600_FORCE_TILING to R600_TILING which can
be set to false to disable tiling on working drm.

Signed-off-by: Dave Airlie <airlied@redhat.com>
This commit is contained in:
Dave Airlie 2011-03-01 14:55:35 +10:00
parent ea4a19c392
commit 929be6eb95
10 changed files with 87 additions and 19 deletions

View File

@ -503,9 +503,9 @@ static INLINE uint32_t r600_translate_colorformat(enum pipe_format format)
}
}
static INLINE boolean r600_is_sampler_format_supported(enum pipe_format format)
static INLINE boolean r600_is_sampler_format_supported(struct pipe_screen *screen, enum pipe_format format)
{
return r600_translate_texformat(format, NULL, NULL, NULL) != ~0;
return r600_translate_texformat(screen, format, NULL, NULL, NULL) != ~0;
}
static INLINE boolean r600_is_colorbuffer_format_supported(enum pipe_format format)

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@ -376,7 +376,7 @@ static struct pipe_sampler_view *evergreen_create_sampler_view(struct pipe_conte
swizzle[1] = state->swizzle_g;
swizzle[2] = state->swizzle_b;
swizzle[3] = state->swizzle_a;
format = r600_translate_texformat(state->format,
format = r600_translate_texformat(ctx->screen, state->format,
swizzle,
&word4, &yuv_format);
if (format == ~0) {

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@ -114,6 +114,8 @@ enum radeon_family r600_get_family(struct radeon *rw);
enum chip_class r600_get_family_class(struct radeon *radeon);
struct r600_tiling_info *r600_get_tiling_info(struct radeon *radeon);
unsigned r600_get_clock_crystal_freq(struct radeon *radeon);
unsigned r600_get_minor_version(struct radeon *radeon);
unsigned r600_get_num_backends(struct radeon *radeon);
/* r600_bo.c */
struct r600_bo;

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@ -430,7 +430,7 @@ static boolean r600_is_format_supported(struct pipe_screen* screen,
return FALSE;
if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
r600_is_sampler_format_supported(format)) {
r600_is_sampler_format_supported(screen, format)) {
retval |= PIPE_BIND_SAMPLER_VIEW;
}

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@ -227,7 +227,7 @@ int r600_conv_pipe_prim(unsigned pprim, unsigned *prim);
/* r600_texture.c */
void r600_init_screen_texture_functions(struct pipe_screen *screen);
void r600_init_surface_functions(struct r600_pipe_context *r600);
uint32_t r600_translate_texformat(enum pipe_format format,
uint32_t r600_translate_texformat(struct pipe_screen *screen, enum pipe_format format,
const unsigned char *swizzle_view,
uint32_t *word4_p, uint32_t *yuv_format_p);
unsigned r600_texture_get_offset(struct r600_resource_texture *rtex,

View File

@ -427,7 +427,7 @@ static struct pipe_sampler_view *r600_create_sampler_view(struct pipe_context *c
swizzle[1] = state->swizzle_g;
swizzle[2] = state->swizzle_b;
swizzle[3] = state->swizzle_a;
format = r600_translate_texformat(state->format,
format = r600_translate_texformat(ctx->screen, state->format,
swizzle,
&word4, &yuv_format);
if (format == ~0) {

View File

@ -498,9 +498,9 @@ static INLINE uint32_t r600_translate_colorformat(enum pipe_format format)
}
}
static INLINE boolean r600_is_sampler_format_supported(enum pipe_format format)
static INLINE boolean r600_is_sampler_format_supported(struct pipe_screen *screen, enum pipe_format format)
{
return r600_translate_texformat(format, NULL, NULL, NULL) != ~0;
return r600_translate_texformat(screen, format, NULL, NULL, NULL) != ~0;
}
static INLINE boolean r600_is_colorbuffer_format_supported(enum pipe_format format)

View File

@ -413,8 +413,13 @@ struct pipe_resource *r600_texture_create(struct pipe_screen *screen,
/* Would like some magic "get_bool_option_once" routine.
*/
if (force_tiling == -1)
force_tiling = debug_get_bool_option("R600_FORCE_TILING", FALSE);
if (force_tiling == -1) {
struct r600_screen *rscreen = (struct r600_screen *)screen;
if (r600_get_minor_version(rscreen->radeon) >= 9)
force_tiling = debug_get_bool_option("R600_TILING", TRUE);
else
force_tiling = debug_get_bool_option("R600_TILING", FALSE);
}
if (force_tiling && permit_hardware_blit(screen, templ)) {
if (!(templ->flags & R600_RESOURCE_FLAG_TRANSFER) &&
@ -804,7 +809,8 @@ static unsigned r600_get_swizzle_combined(const unsigned char *swizzle_format,
}
/* texture format translate */
uint32_t r600_translate_texformat(enum pipe_format format,
uint32_t r600_translate_texformat(struct pipe_screen *screen,
enum pipe_format format,
const unsigned char *swizzle_view,
uint32_t *word4_p, uint32_t *yuv_format_p)
{
@ -870,8 +876,13 @@ uint32_t r600_translate_texformat(enum pipe_format format,
break;
}
if (r600_enable_s3tc == -1)
r600_enable_s3tc = debug_get_bool_option("R600_ENABLE_S3TC", FALSE);
if (r600_enable_s3tc == -1) {
struct r600_screen *rscreen = (struct r600_screen *)screen;
if (r600_get_minor_version(rscreen->radeon) >= 9)
r600_enable_s3tc = 1;
else
r600_enable_s3tc = debug_get_bool_option("R600_ENABLE_S3TC", FALSE);
}
if (desc->layout == UTIL_FORMAT_LAYOUT_RGTC) {
if (!r600_enable_s3tc)

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@ -45,6 +45,10 @@
#define RADEON_INFO_CLOCK_CRYSTAL_FREQ 0x9
#endif
#ifndef RADEON_INFO_NUM_BACKENDS
#define RADEON_INFO_NUM_BACKENDS 0xa
#endif
enum radeon_family r600_get_family(struct radeon *r600)
{
return r600->family;
@ -65,6 +69,17 @@ unsigned r600_get_clock_crystal_freq(struct radeon *radeon)
return radeon->clock_crystal_freq;
}
unsigned r600_get_num_backends(struct radeon *radeon)
{
return radeon->num_backends;
}
unsigned r600_get_minor_version(struct radeon *radeon)
{
return radeon->minor_version;
}
static int radeon_get_device(struct radeon *radeon)
{
struct drm_radeon_info info = {};
@ -195,6 +210,26 @@ static int radeon_get_clock_crystal_freq(struct radeon *radeon)
return 0;
}
static int radeon_get_num_backends(struct radeon *radeon)
{
struct drm_radeon_info info;
uint32_t num_backends;
int r;
radeon->device = 0;
info.request = RADEON_INFO_NUM_BACKENDS;
info.value = (uintptr_t)&num_backends;
r = drmCommandWriteRead(radeon->fd, DRM_RADEON_INFO, &info,
sizeof(struct drm_radeon_info));
if (r)
return r;
radeon->num_backends = num_backends;
return 0;
}
static int radeon_init_fence(struct radeon *radeon)
{
radeon->fence = 1;
@ -211,6 +246,7 @@ static struct radeon *radeon_new(int fd, unsigned device)
{
struct radeon *radeon;
int r;
drmVersionPtr version;
radeon = calloc(1, sizeof(*radeon));
if (radeon == NULL) {
@ -219,13 +255,27 @@ static struct radeon *radeon_new(int fd, unsigned device)
radeon->fd = fd;
radeon->device = device;
radeon->refcount = 1;
if (fd >= 0) {
r = radeon_get_device(radeon);
if (r) {
fprintf(stderr, "Failed to get device id\n");
return radeon_decref(radeon);
}
version = drmGetVersion(radeon->fd);
if (version->version_major != 2) {
fprintf(stderr, "%s: DRM version is %d.%d.%d but this driver is "
"only compatible with 2.x.x\n", __FUNCTION__,
version->version_major, version->version_minor,
version->version_patchlevel);
drmFreeVersion(version);
exit(1);
}
radeon->minor_version = version->version_minor;
drmFreeVersion(version);
r = radeon_get_device(radeon);
if (r) {
fprintf(stderr, "Failed to get device id\n");
return radeon_decref(radeon);
}
radeon->family = radeon_family_from_device(radeon->device);
if (radeon->family == CHIP_UNKNOWN) {
fprintf(stderr, "Unknown chipset 0x%04X\n", radeon->device);
@ -278,6 +328,9 @@ static struct radeon *radeon_new(int fd, unsigned device)
/* get the GPU counter frequency, failure is non fatal */
radeon_get_clock_crystal_freq(radeon);
if (radeon->minor_version >= 9)
radeon_get_num_backends(radeon);
radeon->bomgr = r600_bomgr_create(radeon, 1000000);
if (radeon->bomgr == NULL) {
return NULL;

View File

@ -50,6 +50,8 @@ struct radeon {
unsigned *cfence;
struct r600_bo *fence_bo;
unsigned clock_crystal_freq;
unsigned num_backends;
unsigned minor_version;
};
struct r600_reg {