radeonsi/nir: implement FBFETCH for KHR_blend_equation_advanced
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925161c84c
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9234275320
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@ -2053,6 +2053,11 @@ static LLVMValueRef visit_load_var(struct ac_nir_context *ctx,
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return load_tess_varyings(ctx, instr, false);
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}
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if (ctx->stage == MESA_SHADER_FRAGMENT &&
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var->data.fb_fetch_output &&
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ctx->abi->emit_fbfetch)
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return ctx->abi->emit_fbfetch(ctx->abi);
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for (unsigned chan = comp; chan < ve + comp; chan++) {
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if (indir_index) {
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unsigned count = glsl_count_attribute_slots(
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@ -198,6 +198,8 @@ struct ac_shader_abi {
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LLVMValueRef (*load_base_vertex)(struct ac_shader_abi *abi);
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LLVMValueRef (*emit_fbfetch)(struct ac_shader_abi *abi);
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/* Whether to clamp the shadow reference value to [0,1]on GFX8. Radeonsi currently
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* uses it due to promoting D16 to D32, but radv needs it off. */
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bool clamp_shadow_reference;
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@ -6118,6 +6118,7 @@ static bool si_compile_tgsi_main(struct si_shader_context *ctx)
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ctx->abi.lookup_interp_param = si_nir_lookup_interp_param;
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ctx->abi.load_sample_position = load_sample_position;
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ctx->abi.load_sample_mask_in = load_sample_mask_in;
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ctx->abi.emit_fbfetch = si_nir_emit_fbfetch;
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ctx->abi.emit_kill = si_llvm_emit_kill;
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break;
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case PIPE_SHADER_COMPUTE:
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@ -350,6 +350,7 @@ LLVMValueRef si_load_image_desc(struct si_shader_context *ctx,
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LLVMValueRef list, LLVMValueRef index,
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enum ac_descriptor_type desc_type,
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bool uses_store, bool bindless);
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LLVMValueRef si_nir_emit_fbfetch(struct ac_shader_abi *abi);
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void si_load_system_value(struct si_shader_context *ctx,
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unsigned index,
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@ -1698,11 +1698,8 @@ static void si_llvm_emit_txqs(
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emit_data->output[emit_data->chan] = samples;
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}
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static void si_llvm_emit_fbfetch(const struct lp_build_tgsi_action *action,
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struct lp_build_tgsi_context *bld_base,
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struct lp_build_emit_data *emit_data)
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static LLVMValueRef si_llvm_emit_fbfetch(struct si_shader_context *ctx)
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{
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struct si_shader_context *ctx = si_shader_context(bld_base);
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struct ac_image_args args = {};
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LLVMValueRef ptr, image, fmask;
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@ -1756,8 +1753,23 @@ static void si_llvm_emit_fbfetch(const struct lp_build_tgsi_action *action,
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args.dim = ctx->shader->key.mono.u.ps.fbfetch_layered ?
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ac_image_2darray : ac_image_2d;
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emit_data->output[emit_data->chan] =
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ac_build_image_opcode(&ctx->ac, &args);
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return ac_build_image_opcode(&ctx->ac, &args);
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}
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static void si_tgsi_emit_fbfetch(const struct lp_build_tgsi_action *action,
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struct lp_build_tgsi_context *bld_base,
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struct lp_build_emit_data *emit_data)
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{
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struct si_shader_context *ctx = si_shader_context(bld_base);
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emit_data->output[emit_data->chan] = si_llvm_emit_fbfetch(ctx);
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}
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LLVMValueRef si_nir_emit_fbfetch(struct ac_shader_abi *abi)
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{
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struct si_shader_context *ctx = si_shader_context_from_abi(abi);
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return si_llvm_emit_fbfetch(ctx);
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}
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/**
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@ -1783,7 +1795,7 @@ void si_shader_context_init_mem(struct si_shader_context *ctx)
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bld_base->op_actions[TGSI_OPCODE_LODQ].emit = build_tex_intrinsic;
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bld_base->op_actions[TGSI_OPCODE_TXQS].emit = si_llvm_emit_txqs;
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bld_base->op_actions[TGSI_OPCODE_FBFETCH].emit = si_llvm_emit_fbfetch;
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bld_base->op_actions[TGSI_OPCODE_FBFETCH].emit = si_tgsi_emit_fbfetch;
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bld_base->op_actions[TGSI_OPCODE_LOAD].emit = load_emit;
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bld_base->op_actions[TGSI_OPCODE_STORE].emit = store_emit;
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