KonstantinSeurer
/
mesa
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

tgis: SSE code generator doesn't yet support indirect addressing of temp regs 

Fall back to interpreter in this case.
This commit is contained in:
Brian Paul 2009-04-24 17:08:59 -06:00
parent f2272b5b2f
commit 91eb8baaca
1 changed files with 29 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

29
src/gallium/auxiliary/tgsi/tgsi_sse2.c
View File

@ -1466,6 +1466,31 @@ emit_cmp(
}
}
/**
* Check if inst src/dest regs use indirect addressing into temporary
* register file.
*/
static boolean
indirect_temp_reference(const struct tgsi_full_instruction *inst)
{
uint i;
for (i = 0; i < inst->Instruction.NumSrcRegs; i++) {
const struct tgsi_full_src_register *reg = &inst->FullSrcRegisters[i];
if (reg->SrcRegister.File == TGSI_FILE_TEMPORARY &&
reg->SrcRegister.Indirect)
return TRUE;
}
for (i = 0; i < inst->Instruction.NumDstRegs; i++) {
const struct tgsi_full_dst_register *reg = &inst->FullDstRegisters[i];
if (reg->DstRegister.File == TGSI_FILE_TEMPORARY &&
reg->DstRegister.Indirect)
return TRUE;
}
return FALSE;
}
static int
emit_instruction(
struct x86_function *func,
@ -1473,6 +1498,10 @@ emit_instruction(
{
unsigned chan_index;
/* we can't handle indirect addressing into temp register file yet */
if (indirect_temp_reference(inst))
return FALSE;
switch (inst->Instruction.Opcode) {
case TGSI_OPCODE_ARL:
FOR_EACH_DST0_ENABLED_CHANNEL( *inst, chan_index ) {