intel/blorp: Emit compute program based on BLORP_BATCH_USE_COMPUTE
Reworks: * Don't pack params, just memcpy param struct (s-b Jason) * Old subject: "intel/blorp: Emit compute program if params.cs_prog_data is set" * Various cleanups of push-const size/alignment (s-b Jason) * Fix subslice count by moving to devinfo (s-b Ken) * Simplify cw.InterfaceDescriptor code (s-b Ken) * Drop some comments from i965 (s-b Ken) Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11564>
This commit is contained in:
Jordan Justen
Marge Bot
parent
3e13c4ccf2
commit
90a39cac87
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@ -78,6 +78,11 @@ enum blorp_batch_flags {
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* color buffer.
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*/
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BLORP_BATCH_NO_UPDATE_CLEAR_COLOR = (1 << 2),
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/* This flag indicates that blorp should use a compute program for the
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* operation.
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*/
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BLORP_BATCH_USE_COMPUTE = (1 << 3),
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};
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struct blorp_batch {
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@ -1970,17 +1970,8 @@ blorp_update_clear_color(UNUSED struct blorp_batch *batch,
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}
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}
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/**
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* \brief Execute a blit or render pass operation.
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*
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* To execute the operation, this function manually constructs and emits a
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* batch to draw a rectangle primitive. The batchbuffer is flushed before
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* constructing and after emitting the batch.
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*
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* This function alters no GL state.
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*/
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static void
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blorp_exec(struct blorp_batch *batch, const struct blorp_params *params)
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blorp_exec_3d(struct blorp_batch *batch, const struct blorp_params *params)
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{
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if (!(batch->flags & BLORP_BATCH_NO_UPDATE_CLEAR_COLOR)) {
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blorp_update_clear_color(batch, ¶ms->dst, params->fast_clear_op);
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@ -2017,4 +2008,262 @@ blorp_exec(struct blorp_batch *batch, const struct blorp_params *params)
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}
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}
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#if GFX_VER >= 7
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static void
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blorp_get_compute_push_const(struct blorp_batch *batch,
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const struct blorp_params *params,
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uint32_t threads,
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uint32_t *state_offset,
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unsigned *state_size)
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{
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const struct brw_cs_prog_data *cs_prog_data = params->cs_prog_data;
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const unsigned push_const_size =
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ALIGN(brw_cs_push_const_total_size(cs_prog_data, threads), 64);
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assert(cs_prog_data->push.cross_thread.size +
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cs_prog_data->push.per_thread.size == sizeof(params->wm_inputs));
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if (push_const_size == 0) {
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*state_offset = 0;
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*state_size = 0;
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return;
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}
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uint32_t push_const_offset;
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uint32_t *push_const =
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GFX_VERx10 >= 125 ?
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blorp_alloc_general_state(batch, push_const_size, 64,
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&push_const_offset) :
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blorp_alloc_dynamic_state(batch, push_const_size, 64,
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&push_const_offset);
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memset(push_const, 0x0, push_const_size);
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void *dst = push_const;
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const void *src = (char *)¶ms->wm_inputs;
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if (cs_prog_data->push.cross_thread.size > 0) {
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memcpy(dst, src, cs_prog_data->push.cross_thread.size);
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dst += cs_prog_data->push.cross_thread.size;
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src += cs_prog_data->push.cross_thread.size;
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}
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assert(GFX_VERx10 < 125 || cs_prog_data->push.per_thread.size == 0);
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#if GFX_VERx10 < 125
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if (cs_prog_data->push.per_thread.size > 0) {
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for (unsigned t = 0; t < threads; t++) {
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memcpy(dst, src, (cs_prog_data->push.per_thread.dwords - 1) * 4);
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uint32_t *subgroup_id = dst + cs_prog_data->push.per_thread.size - 4;
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*subgroup_id = t;
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dst += cs_prog_data->push.per_thread.size;
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}
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}
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#endif
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*state_offset = push_const_offset;
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*state_size = push_const_size;
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}
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#endif /* GFX_VER >= 7 */
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static void
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blorp_exec_compute(struct blorp_batch *batch, const struct blorp_params *params)
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{
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assert(!(batch->flags & BLORP_BATCH_NO_UPDATE_CLEAR_COLOR));
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assert(params->hiz_op == ISL_AUX_OP_NONE);
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#if GFX_VER >= 7
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const struct brw_cs_prog_data *cs_prog_data = params->cs_prog_data;
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const struct brw_stage_prog_data *prog_data = &cs_prog_data->base;
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const struct brw_cs_dispatch_info dispatch =
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brw_cs_get_dispatch_info(batch->blorp->compiler->devinfo, cs_prog_data,
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NULL);
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const struct intel_device_info *devinfo = batch->blorp->compiler->devinfo;
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uint32_t group_x0 = params->x0 / cs_prog_data->local_size[0];
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uint32_t group_y0 = params->y0 / cs_prog_data->local_size[1];
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uint32_t group_z0 = params->dst.z_offset;
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uint32_t group_x1 = DIV_ROUND_UP(params->x1, cs_prog_data->local_size[0]);
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uint32_t group_y1 = DIV_ROUND_UP(params->y1, cs_prog_data->local_size[1]);
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assert(params->num_layers >= 1);
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uint32_t group_z1 = params->dst.z_offset + params->num_layers;
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assert(cs_prog_data->local_size[2] == 1);
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#endif /* GFX_VER >= 7 */
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#if GFX_VERx10 >= 125
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blorp_emit(batch, GENX(CFE_STATE), cfe) {
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cfe.MaximumNumberofThreads =
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devinfo->max_cs_threads * devinfo->subslice_total - 1;
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}
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assert(cs_prog_data->push.per_thread.regs == 0);
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blorp_emit(batch, GENX(COMPUTE_WALKER), cw) {
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cw.SIMDSize = dispatch.simd_size / 16;
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cw.LocalXMaximum = cs_prog_data->local_size[0] - 1;
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cw.LocalYMaximum = cs_prog_data->local_size[1] - 1;
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cw.LocalZMaximum = cs_prog_data->local_size[2] - 1;
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cw.ThreadGroupIDStartingX = group_x0;
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cw.ThreadGroupIDStartingY = group_y0;
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cw.ThreadGroupIDStartingZ = group_z0;
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cw.ThreadGroupIDXDimension = group_x1;
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cw.ThreadGroupIDYDimension = group_y1;
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cw.ThreadGroupIDZDimension = group_z1;
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cw.ExecutionMask = 0xffffffff;
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uint32_t surfaces_offset = blorp_setup_binding_table(batch, params);
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uint32_t samplers_offset =
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params->src.enabled ? blorp_emit_sampler_state(batch) : 0;
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uint32_t push_const_offset;
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unsigned push_const_size;
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blorp_get_compute_push_const(batch, params, dispatch.threads,
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&push_const_offset, &push_const_size);
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cw.IndirectDataStartAddress = push_const_offset;
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cw.IndirectDataLength = push_const_size;
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cw.InterfaceDescriptor = (struct GENX(INTERFACE_DESCRIPTOR_DATA)) {
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.KernelStartPointer = params->cs_prog_kernel,
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.SamplerStatePointer = samplers_offset,
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.SamplerCount = params->src.enabled ? 1 : 0,
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.BindingTableEntryCount = params->src.enabled ? 2 : 1,
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.BindingTablePointer = surfaces_offset,
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.NumberofThreadsinGPGPUThreadGroup = dispatch.threads,
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.SharedLocalMemorySize =
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encode_slm_size(GFX_VER, prog_data->total_shared),
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.NumberOfBarriers = cs_prog_data->uses_barrier,
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};
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}
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#elif GFX_VER >= 7
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/* The MEDIA_VFE_STATE documentation for Gfx8+ says:
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*
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* "A stalling PIPE_CONTROL is required before MEDIA_VFE_STATE unless
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* the only bits that are changed are scoreboard related: Scoreboard
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* Enable, Scoreboard Type, Scoreboard Mask, Scoreboard * Delta. For
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* these scoreboard related states, a MEDIA_STATE_FLUSH is sufficient."
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*
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* Earlier generations say "MI_FLUSH" instead of "stalling PIPE_CONTROL",
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* but MI_FLUSH isn't really a thing, so we assume they meant PIPE_CONTROL.
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*/
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blorp_emit(batch, GENX(PIPE_CONTROL), pc) {
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pc.CommandStreamerStallEnable = true;
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pc.StallAtPixelScoreboard = true;
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}
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blorp_emit(batch, GENX(MEDIA_VFE_STATE), vfe) {
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assert(prog_data->total_scratch == 0);
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vfe.MaximumNumberofThreads =
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devinfo->max_cs_threads * devinfo->subslice_total - 1;
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vfe.NumberofURBEntries = GFX_VER >= 8 ? 2 : 0;
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#if GFX_VER < 11
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vfe.ResetGatewayTimer =
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Resettingrelativetimerandlatchingtheglobaltimestamp;
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#endif
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#if GFX_VER < 9
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vfe.BypassGatewayControl = BypassingOpenGatewayCloseGatewayprotocol;
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#endif
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#if GFX_VER == 7
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vfe.GPGPUMode = 1;
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#endif
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vfe.URBEntryAllocationSize = GFX_VER >= 8 ? 2 : 0;
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const uint32_t vfe_curbe_allocation =
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ALIGN(cs_prog_data->push.per_thread.regs * dispatch.threads +
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cs_prog_data->push.cross_thread.regs, 2);
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vfe.CURBEAllocationSize = vfe_curbe_allocation;
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}
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uint32_t push_const_offset;
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unsigned push_const_size;
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blorp_get_compute_push_const(batch, params, dispatch.threads,
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&push_const_offset, &push_const_size);
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blorp_emit(batch, GENX(MEDIA_CURBE_LOAD), curbe) {
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curbe.CURBETotalDataLength = push_const_size;
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curbe.CURBEDataStartAddress = push_const_offset;
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}
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uint32_t surfaces_offset = blorp_setup_binding_table(batch, params);
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uint32_t samplers_offset =
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params->src.enabled ? blorp_emit_sampler_state(batch) : 0;
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struct GENX(INTERFACE_DESCRIPTOR_DATA) idd = {
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.KernelStartPointer = params->cs_prog_kernel,
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.SamplerStatePointer = samplers_offset,
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.SamplerCount = params->src.enabled ? 1 : 0,
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.BindingTableEntryCount = params->src.enabled ? 2 : 1,
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.BindingTablePointer = surfaces_offset,
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.ConstantURBEntryReadLength = cs_prog_data->push.per_thread.regs,
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.NumberofThreadsinGPGPUThreadGroup = dispatch.threads,
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.SharedLocalMemorySize = encode_slm_size(GFX_VER,
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prog_data->total_shared),
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.BarrierEnable = cs_prog_data->uses_barrier,
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#if GFX_VER >= 8 || GEN_IS_HASWELL
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.CrossThreadConstantDataReadLength =
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cs_prog_data->push.cross_thread.regs,
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#endif
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};
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uint32_t idd_offset;
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uint32_t size = GENX(INTERFACE_DESCRIPTOR_DATA_length) * sizeof(uint32_t);
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void *state = blorp_alloc_dynamic_state(batch, size, 64, &idd_offset);
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GENX(INTERFACE_DESCRIPTOR_DATA_pack)(NULL, state, &idd);
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blorp_emit(batch, GENX(MEDIA_INTERFACE_DESCRIPTOR_LOAD), mid) {
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mid.InterfaceDescriptorTotalLength = size;
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mid.InterfaceDescriptorDataStartAddress = idd_offset;
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}
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blorp_emit(batch, GENX(GPGPU_WALKER), ggw) {
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ggw.SIMDSize = dispatch.simd_size / 16;
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ggw.ThreadDepthCounterMaximum = 0;
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ggw.ThreadHeightCounterMaximum = 0;
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ggw.ThreadWidthCounterMaximum = dispatch.threads - 1;
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ggw.ThreadGroupIDStartingX = group_x0;
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ggw.ThreadGroupIDStartingY = group_y0;
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#if GFX_VER >= 8
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ggw.ThreadGroupIDStartingResumeZ = group_z0;
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#else
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ggw.ThreadGroupIDStartingZ = group_z0;
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#endif
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ggw.ThreadGroupIDXDimension = group_x1;
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ggw.ThreadGroupIDYDimension = group_y1;
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ggw.ThreadGroupIDZDimension = group_z1;
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ggw.RightExecutionMask = dispatch.right_mask;
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ggw.BottomExecutionMask = 0xffffffff;
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}
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#else /* GFX_VER >= 7 */
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unreachable("Compute blorp is not supported on SNB and earlier");
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#endif /* GFX_VER >= 7 */
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}
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/**
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* \brief Execute a blit or render pass operation.
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*
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* To execute the operation, this function manually constructs and emits a
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* batch to draw a rectangle primitive. The batchbuffer is flushed before
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* constructing and after emitting the batch.
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*
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* This function alters no GL state.
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*/
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static void
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blorp_exec(struct blorp_batch *batch, const struct blorp_params *params)
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{
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if (batch->flags & BLORP_BATCH_USE_COMPUTE)
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blorp_exec_compute(batch, params);
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else
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blorp_exec_3d(batch, params);
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}
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#endif /* BLORP_GENX_EXEC_H */
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