From 905c1032092a59de55eff4fca3c847954ebac65d Mon Sep 17 00:00:00 2001
From: Leo Liu <leo.liu@amd.com>
Date: Mon, 8 Feb 2021 08:16:06 -0500
Subject: [PATCH] radeon/vcn: add dynamic dpb Tier2 message buffer interface

Tier2 will dynamically manange the dpb buffers, so that can
save even more VRAMs

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: James Zhu <James.Zhu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8916>
---
 src/gallium/drivers/radeon/radeon_vcn_dec.h | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/src/gallium/drivers/radeon/radeon_vcn_dec.h b/src/gallium/drivers/radeon/radeon_vcn_dec.h
index fe66a44e861..a283001e972 100644
--- a/src/gallium/drivers/radeon/radeon_vcn_dec.h
+++ b/src/gallium/drivers/radeon/radeon_vcn_dec.h
@@ -464,6 +464,22 @@ typedef struct rvcn_dec_message_dynamic_dpb_s {
    unsigned int dpbAddrOffset[16];
 } rvcn_dec_message_dynamic_dpb_t;
 
+typedef struct rvcn_dec_message_dynamic_dpb_t2_s {
+    unsigned int dpbConfigFlags;
+    unsigned int dpbLumaPitch;
+    unsigned int dpbLumaAlignedHeight;
+    unsigned int dpbLumaAlignedSize;
+    unsigned int dpbChromaPitch;
+    unsigned int dpbChromaAlignedHeight;
+    unsigned int dpbChromaAlignedSize;
+    unsigned int dpbArraySize;
+
+    unsigned int dpbCurrLo;
+    unsigned int dpbCurrHi;
+    unsigned int dpbAddrLo[16];
+    unsigned int dpbAddrHi[16];
+} rvcn_dec_message_dynamic_dpb_t2_t;
+
 typedef struct {
    unsigned short viewOrderIndex;
    unsigned short viewId;