applied Eric Anholt's patch for Athlon SSE
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902d2faadf
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@ -1,4 +1,4 @@
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/* $Id: common_x86.c,v 1.18 2002/06/29 19:48:17 brianp Exp $ */
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/* $Id: common_x86.c,v 1.19 2002/07/11 15:33:02 brianp Exp $ */
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/*
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/*
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* Mesa 3-D graphics library
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* Mesa 3-D graphics library
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@ -38,6 +38,10 @@
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#if defined(USE_SSE_ASM) && defined(__linux__)
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#if defined(USE_SSE_ASM) && defined(__linux__)
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#include <signal.h>
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#include <signal.h>
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#endif
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#endif
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#if defined(USE_SSE_ASM) && defined(__FreeBSD__)
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#include <sys/types.h>
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#include <sys/sysctl.h>
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#endif
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#include "context.h"
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#include "context.h"
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#include "common_x86_asm.h"
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#include "common_x86_asm.h"
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@ -213,8 +217,16 @@ static void check_os_sse_support( void )
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message( "Cannot test OS support for SSE, disabling to be safe.\n" );
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message( "Cannot test OS support for SSE, disabling to be safe.\n" );
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_mesa_x86_cpu_features &= ~(X86_FEATURE_XMM);
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_mesa_x86_cpu_features &= ~(X86_FEATURE_XMM);
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#endif /* _POSIX_SOURCE && X86_FXSR_MAGIC */
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#endif /* _POSIX_SOURCE && X86_FXSR_MAGIC */
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#elif defined(__FreeBSD__)
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{
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int ret, len, enabled;
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len = sizeof(enabled);
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ret = sysctlbyname("hw.instruction_sse", &enabled, &len, NULL, 0);
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if (ret || !enabled)
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_mesa_x86_cpu_features &= ~(X86_FEATURE_XMM);
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}
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#else
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#else
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/* Do nothing on non-Linux platforms for now.
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/* Do nothing on other platforms for now.
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*/
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*/
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message( "Not testing OS support for SSE, leaving enabled.\n" );
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message( "Not testing OS support for SSE, leaving enabled.\n" );
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#endif /* __linux__ */
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#endif /* __linux__ */
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@ -1,4 +1,4 @@
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/* $Id: common_x86_asm.S,v 1.10 2002/06/11 01:26:58 brianp Exp $ */
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/* $Id: common_x86_asm.S,v 1.11 2002/07/11 15:33:02 brianp Exp $ */
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/*
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/*
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* Mesa 3-D graphics library
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* Mesa 3-D graphics library
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@ -129,6 +129,15 @@ LLBL(cpuid_amd):
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* information after we verify that the extended functions are
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* information after we verify that the extended functions are
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* supported.
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* supported.
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*/
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*/
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/* The features we need are almost all in the extended set. The
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* exception is SSE enable, which is in the standard set (0x1).
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*/
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MOV_L ( CONST(0x1), EAX )
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CPUID
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TEST_L ( EAX, EAX )
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JZ ( LLBL (cpuid_failed) )
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MOV_L ( EDX, ESI )
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MOV_L ( CONST(0x80000000), EAX )
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MOV_L ( CONST(0x80000000), EAX )
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CPUID
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CPUID
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TEST_L ( EAX, EAX )
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TEST_L ( EAX, EAX )
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@ -137,6 +146,10 @@ LLBL(cpuid_amd):
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MOV_L ( CONST(0x80000001), EAX )
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MOV_L ( CONST(0x80000001), EAX )
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CPUID
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CPUID
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MOV_L ( EDX, EAX )
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MOV_L ( EDX, EAX )
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AND_L ( CONST(0x02000000), ESI ) /* OR in the SSE bit */
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OR_L ( ESI, EAX )
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JMP ( LLBL (cpuid_done) )
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JMP ( LLBL (cpuid_done) )
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LLBL(cpuid_other):
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LLBL(cpuid_other):
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