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ilo: add ilo_3d_pipeline_emit_query() 

It replaces

  ilo_3d_pipeline_emit_write_timestamp(),
  ilo_3d_pipeline_emit_write_depth_count(), and
  ilo_3d_pipeline_emit_write_statistics().

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
This commit is contained in:
Chia-I Wu 2014-09-21 21:15:39 +08:00
parent 9c873816a8
commit 900d8136e1
6 changed files with 123 additions and 180 deletions
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55
src/gallium/drivers/ilo/ilo_3d.c
View File

@ -122,32 +122,13 @@ query_process_bo(const struct ilo_3d *hw3d, struct ilo_query *q)
static void
query_begin_bo(struct ilo_3d *hw3d, struct ilo_query *q)
{
uint32_t offset;
/* bo is full */
if (q->used >= q->count)
query_process_bo(hw3d, q);
offset = q->stride * q->used;
/* write the beginning value to the bo */
switch (q->type) {
case PIPE_QUERY_OCCLUSION_COUNTER:
ilo_3d_pipeline_emit_write_depth_count(hw3d->pipeline, q->bo, offset);
break;
case PIPE_QUERY_TIMESTAMP:
/* no-op */
break;
case PIPE_QUERY_TIME_ELAPSED:
ilo_3d_pipeline_emit_write_timestamp(hw3d->pipeline, q->bo, offset);
break;
case PIPE_QUERY_PIPELINE_STATISTICS:
ilo_3d_pipeline_emit_write_statistics(hw3d->pipeline, q->bo, offset);
break;
default:
assert(!"unknown query type");
break;
}
if (q->in_pairs)
ilo_3d_pipeline_emit_query(hw3d->pipeline, q, q->stride * q->used);
}
static void
@ -164,21 +145,7 @@ query_end_bo(struct ilo_3d *hw3d, struct ilo_query *q)
q->used++;
/* write the ending value to the bo */
switch (q->type) {
case PIPE_QUERY_OCCLUSION_COUNTER:
ilo_3d_pipeline_emit_write_depth_count(hw3d->pipeline, q->bo, offset);
break;
case PIPE_QUERY_TIMESTAMP:
case PIPE_QUERY_TIME_ELAPSED:
ilo_3d_pipeline_emit_write_timestamp(hw3d->pipeline, q->bo, offset);
break;
case PIPE_QUERY_PIPELINE_STATISTICS:
ilo_3d_pipeline_emit_write_statistics(hw3d->pipeline, q->bo, offset);
break;
default:
assert(!"unknown query type");
break;
}
ilo_3d_pipeline_emit_query(hw3d->pipeline, q, offset);
}
bool
@ -189,26 +156,15 @@ ilo_3d_init_query(struct pipe_context *pipe, struct ilo_query *q)
switch (q->type) {
case PIPE_QUERY_OCCLUSION_COUNTER:
q->cmd_len = ilo_3d_pipeline_estimate_size(ilo->hw3d->pipeline,
ILO_3D_PIPELINE_WRITE_DEPTH_COUNT, q);
case PIPE_QUERY_TIME_ELAPSED:
q->stride = sizeof(uint64_t);
q->in_pairs = true;
break;
case PIPE_QUERY_TIMESTAMP:
q->cmd_len = ilo_3d_pipeline_estimate_size(ilo->hw3d->pipeline,
ILO_3D_PIPELINE_WRITE_TIMESTAMP, q);
q->stride = sizeof(uint64_t);
q->in_pairs = false;
break;
case PIPE_QUERY_TIME_ELAPSED:
q->cmd_len = ilo_3d_pipeline_estimate_size(ilo->hw3d->pipeline,
ILO_3D_PIPELINE_WRITE_TIMESTAMP, q);
q->stride = sizeof(uint64_t);
q->in_pairs = true;
break;
case PIPE_QUERY_PIPELINE_STATISTICS:
q->cmd_len = ilo_3d_pipeline_estimate_size(ilo->hw3d->pipeline,
ILO_3D_PIPELINE_WRITE_STATISTICS, q);
q->stride = sizeof(uint64_t) * 11;
q->in_pairs = true;
break;
@ -221,6 +177,9 @@ ilo_3d_init_query(struct pipe_context *pipe, struct ilo_query *q)
break;
}
q->cmd_len = ilo_3d_pipeline_estimate_size(ilo->hw3d->pipeline,
ILO_3D_PIPELINE_QUERY, q);
/* double cmd_len and stride if in pairs */
q->cmd_len <<= q->in_pairs;
q->stride <<= q->in_pairs;

30
src/gallium/drivers/ilo/ilo_3d_pipeline.c
View File

@ -233,36 +233,14 @@ ilo_3d_pipeline_emit_flush(struct ilo_3d_pipeline *p)
}
/**
* Emit PIPE_CONTROL with GEN6_PIPE_CONTROL_WRITE_TIMESTAMP post-sync op.
* Emit PIPE_CONTROL or MI_STORE_REGISTER_MEM to save register values.
*/
void
ilo_3d_pipeline_emit_write_timestamp(struct ilo_3d_pipeline *p,
struct intel_bo *bo, uint32_t offset)
ilo_3d_pipeline_emit_query(struct ilo_3d_pipeline *p,
struct ilo_query *q, uint32_t offset)
{
handle_invalid_batch_bo(p, true);
p->emit_write_timestamp(p, bo, offset);
}
/**
* Emit PIPE_CONTROL with GEN6_PIPE_CONTROL_WRITE_PS_DEPTH_COUNT post-sync op.
*/
void
ilo_3d_pipeline_emit_write_depth_count(struct ilo_3d_pipeline *p,
struct intel_bo *bo, uint32_t offset)
{
handle_invalid_batch_bo(p, true);
p->emit_write_depth_count(p, bo, offset);
}
/**
* Emit MI_STORE_REGISTER_MEM to store statistics registers.
*/
void
ilo_3d_pipeline_emit_write_statistics(struct ilo_3d_pipeline *p,
struct intel_bo *bo, uint32_t offset)
{
handle_invalid_batch_bo(p, true);
p->emit_write_statistics(p, bo, offset);
p->emit_query(p, q, offset);
}
void

27
src/gallium/drivers/ilo/ilo_3d_pipeline.h
View File

@ -34,6 +34,7 @@
struct intel_bo;
struct ilo_blitter;
struct ilo_cp;
struct ilo_query;
struct ilo_state_vector;
enum ilo_3d_pipeline_invalidate_flags {
@ -48,9 +49,7 @@ enum ilo_3d_pipeline_invalidate_flags {
enum ilo_3d_pipeline_action {
ILO_3D_PIPELINE_DRAW,
ILO_3D_PIPELINE_FLUSH,
ILO_3D_PIPELINE_WRITE_TIMESTAMP,
ILO_3D_PIPELINE_WRITE_DEPTH_COUNT,
ILO_3D_PIPELINE_WRITE_STATISTICS,
ILO_3D_PIPELINE_QUERY,
ILO_3D_PIPELINE_RECTLIST,
};
@ -80,14 +79,8 @@ struct ilo_3d_pipeline {
void (*emit_flush)(struct ilo_3d_pipeline *pipeline);
void (*emit_write_timestamp)(struct ilo_3d_pipeline *pipeline,
struct intel_bo *bo, uint32_t offset);
void (*emit_write_depth_count)(struct ilo_3d_pipeline *pipeline,
struct intel_bo *bo, uint32_t offset);
void (*emit_write_statistics)(struct ilo_3d_pipeline *pipeline,
struct intel_bo *bo, uint32_t offset);
void (*emit_query)(struct ilo_3d_pipeline *pipeline,
struct ilo_query *q, uint32_t offset);
void (*emit_rectlist)(struct ilo_3d_pipeline *pipeline,
const struct ilo_blitter *blitter);
@ -175,16 +168,8 @@ void
ilo_3d_pipeline_emit_flush(struct ilo_3d_pipeline *p);
void
ilo_3d_pipeline_emit_write_timestamp(struct ilo_3d_pipeline *p,
struct intel_bo *bo, uint32_t offset);
void
ilo_3d_pipeline_emit_write_depth_count(struct ilo_3d_pipeline *p,
struct intel_bo *bo, uint32_t offset);
void
ilo_3d_pipeline_emit_write_statistics(struct ilo_3d_pipeline *p,
struct intel_bo *bo, uint32_t offset);
ilo_3d_pipeline_emit_query(struct ilo_3d_pipeline *p,
struct ilo_query *q, uint32_t offset);
void
ilo_3d_pipeline_emit_rectlist(struct ilo_3d_pipeline *p,

153
src/gallium/drivers/ilo/ilo_3d_pipeline_gen6.c
View File

@ -35,6 +35,7 @@
#include "ilo_builder_mi.h"
#include "ilo_builder_render.h"
#include "ilo_cp.h"
#include "ilo_query.h"
#include "ilo_shader.h"
#include "ilo_state.h"
#include "ilo_3d_pipeline.h"
@ -1465,38 +1466,10 @@ ilo_3d_pipeline_emit_flush_gen6(struct ilo_3d_pipeline *p)
}
void
ilo_3d_pipeline_emit_write_timestamp_gen6(struct ilo_3d_pipeline *p,
struct intel_bo *bo,
uint32_t offset)
ilo_3d_pipeline_emit_query_gen6(struct ilo_3d_pipeline *p,
struct ilo_query *q, uint32_t offset)
{
if (ilo_dev_gen(p->dev) == ILO_GEN(6))
gen6_wa_pipe_control_post_sync(p, true);
gen6_PIPE_CONTROL(p->builder,
GEN6_PIPE_CONTROL_WRITE_TIMESTAMP,
bo, offset, true);
}
void
ilo_3d_pipeline_emit_write_depth_count_gen6(struct ilo_3d_pipeline *p,
struct intel_bo *bo,
uint32_t offset)
{
if (ilo_dev_gen(p->dev) == ILO_GEN(6))
gen6_wa_pipe_control_post_sync(p, false);
gen6_PIPE_CONTROL(p->builder,
GEN6_PIPE_CONTROL_DEPTH_STALL |
GEN6_PIPE_CONTROL_WRITE_PS_DEPTH_COUNT,
bo, offset, true);
}
void
ilo_3d_pipeline_emit_write_statistics_gen6(struct ilo_3d_pipeline *p,
struct intel_bo *bo,
uint32_t offset)
{
const uint32_t regs[] = {
const uint32_t pipeline_statistics_regs[] = {
GEN6_REG_IA_VERTICES_COUNT,
GEN6_REG_IA_PRIMITIVES_COUNT,
GEN6_REG_VS_INVOCATION_COUNT,
@ -1505,23 +1478,56 @@ ilo_3d_pipeline_emit_write_statistics_gen6(struct ilo_3d_pipeline *p,
GEN6_REG_CL_INVOCATION_COUNT,
GEN6_REG_CL_PRIMITIVES_COUNT,
GEN6_REG_PS_INVOCATION_COUNT,
ilo_dev_gen(p->dev) >= ILO_GEN(7) ? GEN7_REG_HS_INVOCATION_COUNT : 0,
ilo_dev_gen(p->dev) >= ILO_GEN(7) ? GEN7_REG_DS_INVOCATION_COUNT : 0,
(ilo_dev_gen(p->dev) >= ILO_GEN(7)) ? GEN7_REG_HS_INVOCATION_COUNT : 0,
(ilo_dev_gen(p->dev) >= ILO_GEN(7)) ? GEN7_REG_DS_INVOCATION_COUNT : 0,
0,
};
int i;
const uint32_t *regs;
int reg_count = 0, i;
ILO_DEV_ASSERT(p->dev, 6, 7.5);
switch (q->type) {
case PIPE_QUERY_OCCLUSION_COUNTER:
if (ilo_dev_gen(p->dev) == ILO_GEN(6))
gen6_wa_pipe_control_post_sync(p, false);
gen6_PIPE_CONTROL(p->builder,
GEN6_PIPE_CONTROL_DEPTH_STALL |
GEN6_PIPE_CONTROL_WRITE_PS_DEPTH_COUNT,
q->bo, offset, true);
break;
case PIPE_QUERY_TIMESTAMP:
case PIPE_QUERY_TIME_ELAPSED:
if (ilo_dev_gen(p->dev) == ILO_GEN(6))
gen6_wa_pipe_control_post_sync(p, true);
gen6_PIPE_CONTROL(p->builder,
GEN6_PIPE_CONTROL_WRITE_TIMESTAMP,
q->bo, offset, true);
break;
case PIPE_QUERY_PIPELINE_STATISTICS:
regs = pipeline_statistics_regs;
reg_count = Elements(pipeline_statistics_regs);
break;
default:
break;
}
if (!reg_count)
return;
p->emit_flush(p);
for (i = 0; i < Elements(regs); i++) {
for (i = 0; i < reg_count; i++) {
if (regs[i]) {
/* store lower 32 bits */
gen6_MI_STORE_REGISTER_MEM(p->builder, bo, offset, regs[i]);
gen6_MI_STORE_REGISTER_MEM(p->builder, q->bo, offset, regs[i]);
/* store higher 32 bits */
gen6_MI_STORE_REGISTER_MEM(p->builder, bo, offset + 4, regs[i] + 4);
}
else {
gen6_MI_STORE_DATA_IMM(p->builder, bo, offset, 0, true);
gen6_MI_STORE_REGISTER_MEM(p->builder, q->bo,
offset + 4, regs[i] + 4);
} else {
gen6_MI_STORE_DATA_IMM(p->builder, q->bo, offset, 0, true);
}
offset += 8;
@ -1854,6 +1860,51 @@ gen6_pipeline_estimate_state_size(const struct ilo_3d_pipeline *p,
return size;
}
int
gen6_pipeline_estimate_query_size(const struct ilo_3d_pipeline *p,
const struct ilo_query *q)
{
int size;
ILO_DEV_ASSERT(p->dev, 6, 7.5);
switch (q->type) {
case PIPE_QUERY_OCCLUSION_COUNTER:
size = GEN6_PIPE_CONTROL__SIZE;
if (ilo_dev_gen(p->dev) == ILO_GEN(6))
size *= 3;
break;
case PIPE_QUERY_TIMESTAMP:
case PIPE_QUERY_TIME_ELAPSED:
size = GEN6_PIPE_CONTROL__SIZE;
if (ilo_dev_gen(p->dev) == ILO_GEN(6))
size *= 2;
break;
case PIPE_QUERY_PIPELINE_STATISTICS:
if (ilo_dev_gen(p->dev) >= ILO_GEN(7)) {
const int num_regs = 10;
const int num_pads = 1;
size = GEN6_PIPE_CONTROL__SIZE +
GEN6_MI_STORE_REGISTER_MEM__SIZE * 2 * num_regs +
GEN6_MI_STORE_DATA_IMM__SIZE * num_pads;
} else {
const int num_regs = 8;
const int num_pads = 3;
size = GEN6_PIPE_CONTROL__SIZE * 3 +
GEN6_MI_STORE_REGISTER_MEM__SIZE * 2 * num_regs +
GEN6_MI_STORE_DATA_IMM__SIZE * num_pads;
}
break;
default:
size = 0;
break;
}
return size;
}
static int
ilo_3d_pipeline_estimate_size_gen6(struct ilo_3d_pipeline *p,
enum ilo_3d_pipeline_action action,
@ -1873,21 +1924,9 @@ ilo_3d_pipeline_estimate_size_gen6(struct ilo_3d_pipeline *p,
case ILO_3D_PIPELINE_FLUSH:
size = GEN6_PIPE_CONTROL__SIZE * 3;
break;
case ILO_3D_PIPELINE_WRITE_TIMESTAMP:
size = GEN6_PIPE_CONTROL__SIZE * 2;
break;
case ILO_3D_PIPELINE_WRITE_DEPTH_COUNT:
size = GEN6_PIPE_CONTROL__SIZE * 3;
break;
case ILO_3D_PIPELINE_WRITE_STATISTICS:
{
const int num_regs = 8;
const int num_pads = 3;
size = GEN6_PIPE_CONTROL__SIZE;
size += GEN6_MI_STORE_REGISTER_MEM__SIZE * 2 * num_regs;
size += GEN6_MI_STORE_DATA_IMM__SIZE * num_pads;
}
case ILO_3D_PIPELINE_QUERY:
size = gen6_pipeline_estimate_query_size(p,
(const struct ilo_query *) arg);
break;
case ILO_3D_PIPELINE_RECTLIST:
size = 64 + 256; /* states + commands */
@ -1907,8 +1946,6 @@ ilo_3d_pipeline_init_gen6(struct ilo_3d_pipeline *p)
p->estimate_size = ilo_3d_pipeline_estimate_size_gen6;
p->emit_draw = ilo_3d_pipeline_emit_draw_gen6;
p->emit_flush = ilo_3d_pipeline_emit_flush_gen6;
p->emit_write_timestamp = ilo_3d_pipeline_emit_write_timestamp_gen6;
p->emit_write_depth_count = ilo_3d_pipeline_emit_write_depth_count_gen6;
p->emit_write_statistics = ilo_3d_pipeline_emit_write_statistics_gen6;
p->emit_query = ilo_3d_pipeline_emit_query_gen6;
p->emit_rectlist = ilo_3d_pipeline_emit_rectlist_gen6;
}

20
src/gallium/drivers/ilo/ilo_3d_pipeline_gen6.h
View File

@ -31,6 +31,7 @@
#include "ilo_common.h"
struct ilo_3d_pipeline;
struct ilo_query;
struct ilo_state_vector;
struct gen6_pipeline_session {
@ -153,23 +154,16 @@ int
gen6_pipeline_estimate_state_size(const struct ilo_3d_pipeline *p,
const struct ilo_state_vector *ilo);
int
gen6_pipeline_estimate_query_size(const struct ilo_3d_pipeline *p,
const struct ilo_query *q);
void
ilo_3d_pipeline_emit_flush_gen6(struct ilo_3d_pipeline *p);
void
ilo_3d_pipeline_emit_write_timestamp_gen6(struct ilo_3d_pipeline *p,
struct intel_bo *bo,
uint32_t offset);
void
ilo_3d_pipeline_emit_write_depth_count_gen6(struct ilo_3d_pipeline *p,
struct intel_bo *bo,
uint32_t offset);
void
ilo_3d_pipeline_emit_write_statistics_gen6(struct ilo_3d_pipeline *p,
struct intel_bo *bo,
uint32_t offset);
ilo_3d_pipeline_emit_query_gen6(struct ilo_3d_pipeline *p,
struct ilo_query *q, uint32_t offset);
void
ilo_3d_pipeline_init_gen6(struct ilo_3d_pipeline *p);

18
src/gallium/drivers/ilo/ilo_3d_pipeline_gen7.c
View File

@ -947,19 +947,11 @@ ilo_3d_pipeline_estimate_size_gen7(struct ilo_3d_pipeline *p,
}
break;
case ILO_3D_PIPELINE_FLUSH:
case ILO_3D_PIPELINE_WRITE_TIMESTAMP:
case ILO_3D_PIPELINE_WRITE_DEPTH_COUNT:
size = GEN6_PIPE_CONTROL__SIZE;
break;
case ILO_3D_PIPELINE_WRITE_STATISTICS:
{
const int num_regs = 10;
const int num_pads = 1;
size = GEN6_PIPE_CONTROL__SIZE;
size += GEN6_MI_STORE_REGISTER_MEM__SIZE * 2 * num_regs;
size += GEN6_MI_STORE_DATA_IMM__SIZE * num_pads;
}
case ILO_3D_PIPELINE_QUERY:
size = gen6_pipeline_estimate_query_size(p,
(const struct ilo_query *) arg);
break;
case ILO_3D_PIPELINE_RECTLIST:
size = 64 + 256; /* states + commands */
@ -979,8 +971,6 @@ ilo_3d_pipeline_init_gen7(struct ilo_3d_pipeline *p)
p->estimate_size = ilo_3d_pipeline_estimate_size_gen7;
p->emit_draw = ilo_3d_pipeline_emit_draw_gen7;
p->emit_flush = ilo_3d_pipeline_emit_flush_gen6;
p->emit_write_timestamp = ilo_3d_pipeline_emit_write_timestamp_gen6;
p->emit_write_depth_count = ilo_3d_pipeline_emit_write_depth_count_gen6;
p->emit_write_statistics = ilo_3d_pipeline_emit_write_statistics_gen6;
p->emit_query = ilo_3d_pipeline_emit_query_gen6;
p->emit_rectlist = ilo_3d_pipeline_emit_rectlist_gen7;
}