i965: Add Gen6 depth stall flushes before disabling depth in BLORP.
We emit these before configuring depth in the normal path, or actually using the depth buffer in BLORP - we just failed to emit them when disabling depth altogether. On Sandybridge, this also requires the post_sync_nonzero flush. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Chad Versace <chad.versace@linux.intel.com> Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
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@ -914,6 +914,9 @@ static void
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gen6_blorp_emit_depth_disable(struct brw_context *brw,
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const brw_blorp_params *params)
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{
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intel_emit_post_sync_nonzero_flush(brw);
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intel_emit_depth_stall_flushes(brw);
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BEGIN_BATCH(7);
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OUT_BATCH(_3DSTATE_DEPTH_BUFFER << 16 | (7 - 2));
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OUT_BATCH((BRW_DEPTHFORMAT_D32_FLOAT << 18) |
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