radv: stop relying on shader modules after SPIRV->NIR

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15766>
This commit is contained in:
Samuel Pitoiset 2022-04-06 12:43:12 +02:00
parent b2568be1de
commit 8db9b175a5
3 changed files with 37 additions and 26 deletions

View File

@ -4416,7 +4416,7 @@ radv_create_shaders(struct radv_pipeline *pipeline, struct radv_pipeline_layout
}
}
if (modules[MESA_SHADER_GEOMETRY] && !pipeline_has_ngg) {
if (nir[MESA_SHADER_GEOMETRY] && !pipeline_has_ngg) {
struct radv_shader_info info = {0};
if (infos[MESA_SHADER_GEOMETRY].vs.outinfo.export_clip_dists)
@ -4440,59 +4440,71 @@ radv_create_shaders(struct radv_pipeline *pipeline, struct radv_pipeline_layout
keep_executable_info, keep_statistic_info, pipeline_key->optimisations_disabled);
}
unsigned active_stages = 0;
for (int i = 0; i < MESA_VULKAN_SHADER_STAGES; i++) {
if (nir[i])
active_stages |= (1 << i);
}
if (nir[MESA_SHADER_FRAGMENT]) {
if (!pipeline->shaders[MESA_SHADER_FRAGMENT]) {
radv_start_feedback(stage_feedbacks[MESA_SHADER_FRAGMENT]);
pipeline->shaders[MESA_SHADER_FRAGMENT] = radv_shader_compile(
device, modules[MESA_SHADER_FRAGMENT], &nir[MESA_SHADER_FRAGMENT], 1,
device, &nir[MESA_SHADER_FRAGMENT], 1,
pipeline_key, infos + MESA_SHADER_FRAGMENT, &args[MESA_SHADER_FRAGMENT],
keep_executable_info, keep_statistic_info, &binaries[MESA_SHADER_FRAGMENT]);
radv_stop_feedback(stage_feedbacks[MESA_SHADER_FRAGMENT], false);
}
active_stages &= ~(1 << MESA_SHADER_FRAGMENT);
}
if (device->physical_device->rad_info.chip_class >= GFX9 && modules[MESA_SHADER_TESS_CTRL]) {
if (device->physical_device->rad_info.chip_class >= GFX9 && nir[MESA_SHADER_TESS_CTRL]) {
if (!pipeline->shaders[MESA_SHADER_TESS_CTRL]) {
struct nir_shader *combined_nir[] = {nir[MESA_SHADER_VERTEX], nir[MESA_SHADER_TESS_CTRL]};
radv_start_feedback(stage_feedbacks[MESA_SHADER_TESS_CTRL]);
pipeline->shaders[MESA_SHADER_TESS_CTRL] = radv_shader_compile(
device, modules[MESA_SHADER_TESS_CTRL], combined_nir, 2, pipeline_key,
device, combined_nir, 2, pipeline_key,
&infos[MESA_SHADER_TESS_CTRL], &args[MESA_SHADER_TESS_CTRL], keep_executable_info,
keep_statistic_info, &binaries[MESA_SHADER_TESS_CTRL]);
radv_stop_feedback(stage_feedbacks[MESA_SHADER_TESS_CTRL], false);
}
modules[MESA_SHADER_VERTEX] = NULL;
active_stages &= ~(1 << MESA_SHADER_VERTEX);
active_stages &= ~(1 << MESA_SHADER_TESS_CTRL);
}
if (device->physical_device->rad_info.chip_class >= GFX9 && modules[MESA_SHADER_GEOMETRY]) {
if (device->physical_device->rad_info.chip_class >= GFX9 && nir[MESA_SHADER_GEOMETRY]) {
gl_shader_stage pre_stage =
modules[MESA_SHADER_TESS_EVAL] ? MESA_SHADER_TESS_EVAL : MESA_SHADER_VERTEX;
nir[MESA_SHADER_TESS_EVAL] ? MESA_SHADER_TESS_EVAL : MESA_SHADER_VERTEX;
if (!pipeline->shaders[MESA_SHADER_GEOMETRY]) {
struct nir_shader *combined_nir[] = {nir[pre_stage], nir[MESA_SHADER_GEOMETRY]};
radv_start_feedback(stage_feedbacks[MESA_SHADER_GEOMETRY]);
pipeline->shaders[MESA_SHADER_GEOMETRY] = radv_shader_compile(
device, modules[MESA_SHADER_GEOMETRY], combined_nir, 2, pipeline_key,
device, combined_nir, 2, pipeline_key,
&infos[MESA_SHADER_GEOMETRY], &args[MESA_SHADER_GEOMETRY], keep_executable_info,
keep_statistic_info, &binaries[MESA_SHADER_GEOMETRY]);
radv_stop_feedback(stage_feedbacks[MESA_SHADER_GEOMETRY], false);
}
modules[pre_stage] = NULL;
active_stages &= ~(1 << pre_stage);
active_stages &= ~(1 << MESA_SHADER_GEOMETRY);
}
for (int i = 0; i < MESA_VULKAN_SHADER_STAGES; ++i) {
if (modules[i] && !pipeline->shaders[i]) {
u_foreach_bit(i, active_stages) {
if (!pipeline->shaders[i]) {
radv_start_feedback(stage_feedbacks[i]);
pipeline->shaders[i] = radv_shader_compile(
device, modules[i], &nir[i], 1, pipeline_key, infos + i, &args[i],
device, &nir[i], 1, pipeline_key, infos + i, &args[i],
keep_executable_info, keep_statistic_info, &binaries[i]);
radv_stop_feedback(stage_feedbacks[i], false);

View File

@ -1937,8 +1937,7 @@ radv_dump_nir_shaders(struct nir_shader *const *shaders, int shader_count)
}
static struct radv_shader *
shader_compile(struct radv_device *device, struct vk_shader_module *module,
struct nir_shader *const *shaders, int shader_count, gl_shader_stage stage,
shader_compile(struct radv_device *device, struct nir_shader *const *shaders, int shader_count, gl_shader_stage stage,
struct radv_shader_info *info, const struct radv_shader_args *args,
struct radv_nir_compiler_options *options, bool gs_copy_shader,
bool trap_handler_shader, bool keep_shader_info, bool keep_statistic_info,
@ -2009,11 +2008,11 @@ shader_compile(struct radv_device *device, struct vk_shader_module *module,
}
struct radv_shader *
radv_shader_compile(struct radv_device *device, struct vk_shader_module *module,
struct nir_shader *const *shaders, int shader_count,
const struct radv_pipeline_key *key, struct radv_shader_info *info,
const struct radv_shader_args *args, bool keep_shader_info,
bool keep_statistic_info, struct radv_shader_binary **binary_out)
radv_shader_compile(struct radv_device *device, struct nir_shader *const *shaders, int shader_count,
const struct radv_pipeline_key *key,
struct radv_shader_info *info, const struct radv_shader_args *args,
bool keep_shader_info, bool keep_statistic_info,
struct radv_shader_binary **binary_out)
{
gl_shader_stage stage = shaders[shader_count - 1]->info.stage;
struct radv_nir_compiler_options options = {0};
@ -2024,7 +2023,7 @@ radv_shader_compile(struct radv_device *device, struct vk_shader_module *module,
options.robust_buffer_access = device->robust_buffer_access;
options.wgp_mode = radv_should_use_wgp_mode(device, stage, info);
return shader_compile(device, module, shaders, shader_count, stage, info, args, &options, false,
return shader_compile(device, shaders, shader_count, stage, info, args, &options, false,
false, keep_shader_info, keep_statistic_info, binary_out);
}
@ -2039,7 +2038,7 @@ radv_create_gs_copy_shader(struct radv_device *device, struct nir_shader *shader
options.key.optimisations_disabled = disable_optimizations;
return shader_compile(device, NULL, &shader, 1, stage, info, args, &options, true, false,
return shader_compile(device, &shader, 1, stage, info, args, &options, true, false,
keep_shader_info, keep_statistic_info, binary_out);
}
@ -2068,7 +2067,7 @@ radv_create_trap_handler_shader(struct radv_device *device)
radv_declare_shader_args(device->physical_device->rad_info.chip_class, &key, &info,
MESA_SHADER_COMPUTE, false, MESA_SHADER_VERTEX, &args);
shader = shader_compile(device, NULL, &b.shader, 1, MESA_SHADER_COMPUTE, &info, &args, &options,
shader = shader_compile(device, &b.shader, 1, MESA_SHADER_COMPUTE, &info, &args, &options,
false, true, true, false, &binary);
trap->alloc = radv_alloc_shader_memory(device, shader->code_size, NULL);

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@ -537,10 +537,10 @@ struct radv_shader *radv_shader_create(struct radv_device *device,
bool keep_shader_info, bool from_cache,
const struct radv_shader_args *args);
struct radv_shader *radv_shader_compile(
struct radv_device *device, struct vk_shader_module *module, struct nir_shader *const *shaders,
int shader_count, const struct radv_pipeline_key *key, struct radv_shader_info *info,
const struct radv_shader_args *args, bool keep_shader_info, bool keep_statistic_info,
struct radv_shader_binary **binary_out);
struct radv_device *device, struct nir_shader *const *shaders, int shader_count,
const struct radv_pipeline_key *key,
struct radv_shader_info *info, const struct radv_shader_args *args, bool keep_shader_info,
bool keep_statistic_info, struct radv_shader_binary **binary_out);
bool radv_shader_binary_upload(struct radv_device *device, const struct radv_shader_binary *binary,
struct radv_shader *shader, void *dest_ptr);