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i965: Fix HW blitter pitch limits 

The BLT pitch is specified in bytes for linear surfaces and in dwords
for tiled surfaces. In both cases the programmable limit is 32,767, so
adjust the check to compensate for the effect of tiling.

v2: Tweak whitespace for functions (Kenneth)

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Kristian Høgsberg <krh@bitplanet.net>
Cc: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by Kenneth Graunke <kenneth@whitecape.org>
Cc: mesa-stable@lists.freedesktop.org
This commit is contained in:
Chris Wilson 2015-06-05 13:49:08 +01:00
parent 8614b9e489
commit 8da79b8378
1 changed files with 14 additions and 5 deletions
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19
src/mesa/drivers/dri/i965/intel_blit.c
View File

@ -130,6 +130,15 @@ set_blitter_tiling(struct brw_context *brw,
ADVANCE_BATCH(); \
} while (0)
static int
blt_pitch(struct intel_mipmap_tree *mt)
{
int pitch = mt->pitch;
if (mt->tiling)
pitch /= 4;
return pitch;
}
/**
* Implements a rectangular block transfer (blit) of pixels between two
* miptrees.
@ -197,14 +206,14 @@ intel_miptree_blit(struct brw_context *brw,
*
* Furthermore, intelEmitCopyBlit (which is called below) uses a signed
* 16-bit integer to represent buffer pitch, so it can only handle buffer
* pitches < 32k.
* pitches < 32k. However, the pitch is measured in bytes for linear buffers
* and dwords for tiled buffers.
*
* As a result of these two limitations, we can only use the blitter to do
* this copy when the miptree's pitch is less than 32k.
* this copy when the miptree's pitch is less than 32k linear or 128k tiled.
*/
if (src_mt->pitch >= 32768 ||
dst_mt->pitch >= 32768) {
perf_debug("Falling back due to >=32k pitch\n");
if (blt_pitch(src_mt) >= 32768 || blt_pitch(dst_mt) >= 32768) {
perf_debug("Falling back due to >= 32k/128k pitch\n");
return false;
}