radeon/llvm: Remove AsmPrinter files

This commit is contained in:
Tom Stellard 2012-04-24 21:20:26 -04:00
parent ba9bd41880
commit 8d3bf7ced5
5 changed files with 0 additions and 443 deletions

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@ -1,82 +0,0 @@
//===------ AMDILAsmBackend.cpp - AMDIL Assembly Backend ---===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//==-----------------------------------------------------------------------===//
//
//
#include "AMDILAsmBackend.h"
#include "llvm/Support/TargetRegistry.h"
using namespace llvm;
namespace llvm {
ASM_BACKEND_CLASS* createAMDILAsmBackend(const ASM_BACKEND_CLASS &T,
const std::string &TT)
{
return new AMDILAsmBackend(T);
}
} // namespace llvm
//===--------------------- Default AMDIL Asm Backend ---------------------===//
AMDILAsmBackend::AMDILAsmBackend(const ASM_BACKEND_CLASS &T)
: ASM_BACKEND_CLASS()
{
}
MCObjectWriter *
AMDILAsmBackend::createObjectWriter(raw_ostream &OS) const
{
return 0;
}
bool
AMDILAsmBackend::doesSectionRequireSymbols(const MCSection &Section) const
{
return false;
}
bool
AMDILAsmBackend::isSectionAtomizable(const MCSection &Section) const
{
return true;
}
bool
AMDILAsmBackend::isVirtualSection(const MCSection &Section) const
{
return false;
//const MCSectionELF &SE = static_cast<const MCSectionELF&>(Section);
//return SE.getType() == MCSectionELF::SHT_NOBITS;
}
void
AMDILAsmBackend::ApplyFixup(const MCFixup &Fixup, char *Data, unsigned DataSize,
uint64_t Value) const
{
}
bool
AMDILAsmBackend::MayNeedRelaxation(const MCInst &Inst) const
{
return false;
}
void
AMDILAsmBackend::RelaxInstruction(const MCInst &Inst,
MCInst &Res) const
{
}
bool
AMDILAsmBackend::WriteNopData(uint64_t Count, MCObjectWriter *OW) const
{
return false;
}
unsigned
AMDILAsmBackend::getNumFixupKinds() const
{
return 0;
}

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@ -1,49 +0,0 @@
//===-- AMDILAsmBackend.h - TODO: Add brief description -------===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//==-----------------------------------------------------------------------===//
#ifndef _AMDIL_ASM_BACKEND_H_
#define _AMDIL_ASM_BACKEND_H_
#include "AMDIL.h"
#include "llvm/MC/MCAsmBackend.h"
#define ASM_BACKEND_CLASS MCAsmBackend
using namespace llvm;
namespace llvm {
class AMDILAsmBackend : public ASM_BACKEND_CLASS {
public:
AMDILAsmBackend(const ASM_BACKEND_CLASS &T);
virtual MCObjectWriter *createObjectWriter(raw_ostream &OS) const;
virtual bool doesSectionRequireSymbols(const MCSection &Section) const;
virtual bool isSectionAtomizable(const MCSection &Section) const;
virtual bool isVirtualSection(const MCSection &Section) const;
virtual void ApplyFixup(const MCFixup &Fixup, char *Data, unsigned DataSize,
uint64_t Value) const;
virtual bool
MayNeedRelaxation(const MCInst &Inst
) const;
virtual void RelaxInstruction(const MCInst &Inst, MCInst &Res) const;
virtual bool WriteNopData(uint64_t Count, MCObjectWriter *OW) const;
unsigned getNumFixupKinds() const;
virtual void applyFixup(const MCFixup &Fixup, char * Data, unsigned DataSize,
uint64_t value) const { }
virtual bool mayNeedRelaxation(const MCInst &Inst) const { return false; }
virtual bool fixupNeedsRelaxation(const MCFixup &fixup, uint64_t value,
const MCInstFragment *DF,
const MCAsmLayout &Layout) const
{ return false; }
virtual void relaxInstruction(const MCInst &Inst, MCInst &Res) const
{}
virtual bool writeNopData(uint64_t data, llvm::MCObjectWriter * writer) const
{ return false; }
}; // class AMDILAsmBackend;
} // llvm namespace
#endif // _AMDIL_ASM_BACKEND_H_

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@ -1,149 +0,0 @@
//===-- AMDILAsmPrinter7XX.cpp - TODO: Add brief description -------===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//==-----------------------------------------------------------------------===//
#include "AMDIL7XXAsmPrinter.h"
#include "AMDILAlgorithms.tpp"
#include "AMDIL7XXAsmPrinter.h"
#include "AMDILDevices.h"
#include "AMDILGlobalManager.h"
#include "AMDILKernelManager.h"
#include "AMDILMachineFunctionInfo.h"
#include "AMDILUtilityFunctions.h"
#include "llvm/ADT/SmallString.h"
#include "llvm/ADT/Statistic.h"
#include "llvm/ADT/StringExtras.h"
#include "llvm/Analysis/DebugInfo.h"
#include "llvm/CodeGen/MachineConstantPool.h"
#include "llvm/CodeGen/MachineModuleInfo.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/Constants.h"
#include "llvm/MC/MCAsmInfo.h"
#include "llvm/MC/MCStreamer.h"
#include "llvm/MC/MCSymbol.h"
#include "llvm/Metadata.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/DebugLoc.h"
#include "llvm/Support/InstIterator.h"
#include "llvm/Support/TargetRegistry.h"
#include "llvm/Type.h"
using namespace llvm;
// TODO: Add support for verbose.
AMDIL7XXAsmPrinter::AMDIL7XXAsmPrinter(TargetMachine& TM, MCStreamer &Streamer)
: AMDILAsmPrinter(TM, Streamer)
{
}
AMDIL7XXAsmPrinter::~AMDIL7XXAsmPrinter()
{
}
///
/// @param name
/// @brief strips KERNEL_PREFIX and KERNEL_SUFFIX from the name
/// and returns that name if both of the tokens are present.
///
static
std::string Strip(const std::string &name)
{
size_t start = name.find("__OpenCL_");
size_t end = name.find("_kernel");
if (start == std::string::npos
|| end == std::string::npos
|| (start == end)) {
return name;
} else {
return name.substr(9, name.length()-16);
}
}
void
AMDIL7XXAsmPrinter::emitMacroFunc(const MachineInstr *MI,
llvm::raw_ostream &O)
{
const AMDILSubtarget *curTarget = mTM->getSubtargetImpl();
const char *name = "unknown";
llvm::StringRef nameRef;
if (MI->getOperand(0).isGlobal()) {
nameRef = MI->getOperand(0).getGlobal()->getName();
name = nameRef.data();
if (curTarget->device()->usesHardware(
AMDILDeviceInfo::DoubleOps)
&& !::strncmp(name, "__sqrt_f64", 10) ) {
name = "__sqrt_f64_7xx";
}
}
emitMCallInst(MI, O, name);
}
bool
AMDIL7XXAsmPrinter::runOnMachineFunction(MachineFunction &lMF)
{
this->MF = &lMF;
mMeta->setMF(&lMF);
mMFI = lMF.getInfo<AMDILMachineFunctionInfo>();
SetupMachineFunction(lMF);
std::string kernelName = MF->getFunction()->getName();
mName = Strip(kernelName);
mKernelName = kernelName;
EmitFunctionHeader();
EmitFunctionBody();
return false;
}
void
AMDIL7XXAsmPrinter::EmitInstruction(const MachineInstr *II)
{
std::string FunStr;
raw_string_ostream OFunStr(FunStr);
formatted_raw_ostream O(OFunStr);
const AMDILSubtarget *curTarget = mTM->getSubtargetImpl();
if (mDebugMode) {
O << ";" ;
II->print(O);
}
if (isMacroFunc(II)) {
emitMacroFunc(II, O);
O.flush();
OutStreamer.EmitRawText(StringRef(FunStr));
return;
}
if (isMacroCall(II)) {
const char *name;
name = mTM->getInstrInfo()->getName(II->getOpcode()) + 5;
int macronum = amd::MacroDBFindMacro(name);
O << "\t;"<< name<<"\n";
O << "\tmcall("<<macronum<<")";
if (curTarget->device()->isSupported(
AMDILDeviceInfo::MacroDB)) {
mMacroIDs.insert(macronum);
} else {
mMFI->addCalledIntr(macronum);
}
}
// Print the assembly for the instruction.
// We want to make sure that we do HW constants
// before we do arena segment
if (mMeta->useCompilerWrite(II)) {
// TODO: This is a hack to get around some
// conformance failures.
O << "\tif_logicalz cb0[0].x\n";
O << "\tuav_raw_store_id("
<< curTarget->device()->getResourceID(AMDILDevice::RAW_UAV_ID)
<< ") ";
O << "mem0.x___, cb0[3].x, r0.0\n";
O << "\tendif\n";
mMFI->addMetadata(";memory:compilerwrite");
} else {
printInstruction(II, O);
}
O.flush();
OutStreamer.EmitRawText(StringRef(FunStr));
}

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@ -1,162 +0,0 @@
//===-- AMDILAsmPrinterEG.cpp - TODO: Add brief description -------===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//==-----------------------------------------------------------------------===//
#include "AMDILEGAsmPrinter.h"
#include "AMDILAlgorithms.tpp"
#include "AMDILDevices.h"
#include "AMDILEGAsmPrinter.h"
#include "AMDILGlobalManager.h"
#include "AMDILKernelManager.h"
#include "AMDILMachineFunctionInfo.h"
#include "AMDILUtilityFunctions.h"
#include "llvm/ADT/SmallString.h"
#include "llvm/ADT/Statistic.h"
#include "llvm/ADT/StringExtras.h"
#include "llvm/Analysis/DebugInfo.h"
#include "llvm/CodeGen/MachineConstantPool.h"
#include "llvm/CodeGen/MachineModuleInfo.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/Constants.h"
#include "llvm/MC/MCAsmInfo.h"
#include "llvm/MC/MCStreamer.h"
#include "llvm/MC/MCSymbol.h"
#include "llvm/Metadata.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/DebugLoc.h"
#include "llvm/Support/InstIterator.h"
#include "llvm/Support/TargetRegistry.h"
#include "llvm/Type.h"
using namespace llvm;
// TODO: Add support for verbose.
AMDILEGAsmPrinter::AMDILEGAsmPrinter(TargetMachine& TM, MCStreamer &Streamer)
: AMDILAsmPrinter(TM, Streamer)
{
}
AMDILEGAsmPrinter::~AMDILEGAsmPrinter()
{
}
//
// @param name
// @brief strips KERNEL_PREFIX and KERNEL_SUFFIX from the name
// and returns that name if both of the tokens are present.
//
static
std::string Strip(const std::string &name)
{
size_t start = name.find("__OpenCL_");
size_t end = name.find("_kernel");
if (start == std::string::npos
|| end == std::string::npos
|| (start == end)) {
return name;
} else {
return name.substr(9, name.length()-16);
}
}
void
AMDILEGAsmPrinter::emitMacroFunc(const MachineInstr *MI,
llvm::raw_ostream &O)
{
const AMDILSubtarget *curTarget = mTM->getSubtargetImpl();
const char *name = "unknown";
llvm::StringRef nameRef;
if (MI->getOperand(0).isGlobal()) {
nameRef = MI->getOperand(0).getGlobal()->getName();
name = nameRef.data();
}
if (!::strncmp(name, "__fma_f32", 9) && curTarget->device()->usesHardware(
AMDILDeviceInfo::FMA)) {
name = "__hwfma_f32";
}
emitMCallInst(MI, O, name);
}
bool
AMDILEGAsmPrinter::runOnMachineFunction(MachineFunction &lMF)
{
this->MF = &lMF;
mMeta->setMF(&lMF);
mMFI = lMF.getInfo<AMDILMachineFunctionInfo>();
SetupMachineFunction(lMF);
std::string kernelName = MF->getFunction()->getName();
mName = Strip(kernelName);
mKernelName = kernelName;
EmitFunctionHeader();
EmitFunctionBody();
return false;
}
void
AMDILEGAsmPrinter::EmitInstruction(const MachineInstr *II)
{
std::string FunStr;
raw_string_ostream OFunStr(FunStr);
formatted_raw_ostream O(OFunStr);
const AMDILSubtarget *curTarget = mTM->getSubtargetImpl();
if (mDebugMode) {
O << ";" ;
II->print(O);
}
if (isMacroFunc(II)) {
emitMacroFunc(II, O);
O.flush();
OutStreamer.EmitRawText(StringRef(FunStr));
return;
}
if (isMacroCall(II)) {
const char *name;
name = mTM->getInstrInfo()->getName(II->getOpcode()) + 5;
if (!::strncmp(name, "__fma_f32", 9)
&& curTarget->device()->usesHardware(
AMDILDeviceInfo::FMA)) {
name = "__hwfma_f32";
}
//assert(0 &&
//"Found a macro that is still in use!");
int macronum = amd::MacroDBFindMacro(name);
O << "\t;"<< name<<"\n";
O << "\tmcall("<<macronum<<")";
if (curTarget->device()->isSupported(
AMDILDeviceInfo::MacroDB)) {
mMacroIDs.insert(macronum);
} else {
mMFI->addCalledIntr(macronum);
}
}
// Print the assembly for the instruction.
// We want to make sure that we do HW constants
// before we do arena segment
// TODO: This is a hack to get around some
// conformance failures.
if (mMeta->useCompilerWrite(II)) {
O << "\tif_logicalz cb0[0].x\n";
if (mMFI->usesMem(AMDILDevice::RAW_UAV_ID)) {
O << "\tuav_raw_store_id("
<< curTarget->device()->getResourceID(AMDILDevice::RAW_UAV_ID)
<< ") ";
O << "mem0.x___, cb0[3].x, r0.0\n";
} else {
O << "\tuav_arena_store_id("
<< curTarget->device()->getResourceID(AMDILDevice::ARENA_UAV_ID)
<< ")_size(dword) ";
O << "cb0[3].x, r0.0\n";
}
O << "\tendif\n";
mMFI->addMetadata(";memory:compilerwrite");
} else {
printInstruction(II, O);
}
O.flush();
OutStreamer.EmitRawText(StringRef(FunStr));
}

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@ -19,7 +19,6 @@ GENERATED_SOURCES := \
CPP_SOURCES := \
AMDIL7XXDevice.cpp \
AMDILAsmBackend.cpp \
AMDILBarrierDetect.cpp \
AMDILCFGStructurizer.cpp \
AMDILDevice.cpp \