radeon/llvm: Remove AsmPrinter files
This commit is contained in:
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ba9bd41880
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8d3bf7ced5
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@ -1,82 +0,0 @@
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//===------ AMDILAsmBackend.cpp - AMDIL Assembly Backend ---===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//==-----------------------------------------------------------------------===//
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//
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//
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#include "AMDILAsmBackend.h"
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#include "llvm/Support/TargetRegistry.h"
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using namespace llvm;
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namespace llvm {
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ASM_BACKEND_CLASS* createAMDILAsmBackend(const ASM_BACKEND_CLASS &T,
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const std::string &TT)
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{
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return new AMDILAsmBackend(T);
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}
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} // namespace llvm
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//===--------------------- Default AMDIL Asm Backend ---------------------===//
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AMDILAsmBackend::AMDILAsmBackend(const ASM_BACKEND_CLASS &T)
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: ASM_BACKEND_CLASS()
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{
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}
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MCObjectWriter *
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AMDILAsmBackend::createObjectWriter(raw_ostream &OS) const
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{
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return 0;
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}
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bool
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AMDILAsmBackend::doesSectionRequireSymbols(const MCSection &Section) const
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{
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return false;
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}
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bool
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AMDILAsmBackend::isSectionAtomizable(const MCSection &Section) const
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{
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return true;
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}
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bool
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AMDILAsmBackend::isVirtualSection(const MCSection &Section) const
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{
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return false;
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//const MCSectionELF &SE = static_cast<const MCSectionELF&>(Section);
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//return SE.getType() == MCSectionELF::SHT_NOBITS;
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}
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void
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AMDILAsmBackend::ApplyFixup(const MCFixup &Fixup, char *Data, unsigned DataSize,
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uint64_t Value) const
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{
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}
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bool
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AMDILAsmBackend::MayNeedRelaxation(const MCInst &Inst) const
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{
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return false;
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}
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void
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AMDILAsmBackend::RelaxInstruction(const MCInst &Inst,
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MCInst &Res) const
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{
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}
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bool
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AMDILAsmBackend::WriteNopData(uint64_t Count, MCObjectWriter *OW) const
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{
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return false;
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}
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unsigned
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AMDILAsmBackend::getNumFixupKinds() const
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{
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return 0;
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}
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@ -1,49 +0,0 @@
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//===-- AMDILAsmBackend.h - TODO: Add brief description -------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//==-----------------------------------------------------------------------===//
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#ifndef _AMDIL_ASM_BACKEND_H_
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#define _AMDIL_ASM_BACKEND_H_
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#include "AMDIL.h"
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#include "llvm/MC/MCAsmBackend.h"
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#define ASM_BACKEND_CLASS MCAsmBackend
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using namespace llvm;
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namespace llvm {
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class AMDILAsmBackend : public ASM_BACKEND_CLASS {
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public:
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AMDILAsmBackend(const ASM_BACKEND_CLASS &T);
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virtual MCObjectWriter *createObjectWriter(raw_ostream &OS) const;
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virtual bool doesSectionRequireSymbols(const MCSection &Section) const;
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virtual bool isSectionAtomizable(const MCSection &Section) const;
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virtual bool isVirtualSection(const MCSection &Section) const;
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virtual void ApplyFixup(const MCFixup &Fixup, char *Data, unsigned DataSize,
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uint64_t Value) const;
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virtual bool
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MayNeedRelaxation(const MCInst &Inst
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) const;
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virtual void RelaxInstruction(const MCInst &Inst, MCInst &Res) const;
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virtual bool WriteNopData(uint64_t Count, MCObjectWriter *OW) const;
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unsigned getNumFixupKinds() const;
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virtual void applyFixup(const MCFixup &Fixup, char * Data, unsigned DataSize,
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uint64_t value) const { }
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virtual bool mayNeedRelaxation(const MCInst &Inst) const { return false; }
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virtual bool fixupNeedsRelaxation(const MCFixup &fixup, uint64_t value,
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const MCInstFragment *DF,
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const MCAsmLayout &Layout) const
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{ return false; }
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virtual void relaxInstruction(const MCInst &Inst, MCInst &Res) const
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{}
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virtual bool writeNopData(uint64_t data, llvm::MCObjectWriter * writer) const
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{ return false; }
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}; // class AMDILAsmBackend;
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} // llvm namespace
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#endif // _AMDIL_ASM_BACKEND_H_
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@ -1,149 +0,0 @@
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//===-- AMDILAsmPrinter7XX.cpp - TODO: Add brief description -------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//==-----------------------------------------------------------------------===//
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#include "AMDIL7XXAsmPrinter.h"
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#include "AMDILAlgorithms.tpp"
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#include "AMDIL7XXAsmPrinter.h"
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#include "AMDILDevices.h"
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#include "AMDILGlobalManager.h"
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#include "AMDILKernelManager.h"
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#include "AMDILMachineFunctionInfo.h"
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#include "AMDILUtilityFunctions.h"
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#include "llvm/ADT/SmallString.h"
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#include "llvm/ADT/Statistic.h"
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#include "llvm/ADT/StringExtras.h"
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#include "llvm/Analysis/DebugInfo.h"
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#include "llvm/CodeGen/MachineConstantPool.h"
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#include "llvm/CodeGen/MachineModuleInfo.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/Constants.h"
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#include "llvm/MC/MCAsmInfo.h"
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#include "llvm/MC/MCStreamer.h"
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#include "llvm/MC/MCSymbol.h"
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#include "llvm/Metadata.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/DebugLoc.h"
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#include "llvm/Support/InstIterator.h"
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#include "llvm/Support/TargetRegistry.h"
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#include "llvm/Type.h"
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using namespace llvm;
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// TODO: Add support for verbose.
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AMDIL7XXAsmPrinter::AMDIL7XXAsmPrinter(TargetMachine& TM, MCStreamer &Streamer)
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: AMDILAsmPrinter(TM, Streamer)
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{
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}
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AMDIL7XXAsmPrinter::~AMDIL7XXAsmPrinter()
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{
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}
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///
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/// @param name
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/// @brief strips KERNEL_PREFIX and KERNEL_SUFFIX from the name
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/// and returns that name if both of the tokens are present.
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///
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static
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std::string Strip(const std::string &name)
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{
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size_t start = name.find("__OpenCL_");
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size_t end = name.find("_kernel");
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if (start == std::string::npos
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|| end == std::string::npos
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|| (start == end)) {
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return name;
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} else {
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return name.substr(9, name.length()-16);
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}
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}
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void
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AMDIL7XXAsmPrinter::emitMacroFunc(const MachineInstr *MI,
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llvm::raw_ostream &O)
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{
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const AMDILSubtarget *curTarget = mTM->getSubtargetImpl();
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const char *name = "unknown";
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llvm::StringRef nameRef;
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if (MI->getOperand(0).isGlobal()) {
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nameRef = MI->getOperand(0).getGlobal()->getName();
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name = nameRef.data();
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if (curTarget->device()->usesHardware(
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AMDILDeviceInfo::DoubleOps)
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&& !::strncmp(name, "__sqrt_f64", 10) ) {
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name = "__sqrt_f64_7xx";
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}
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}
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emitMCallInst(MI, O, name);
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}
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bool
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AMDIL7XXAsmPrinter::runOnMachineFunction(MachineFunction &lMF)
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{
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this->MF = &lMF;
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mMeta->setMF(&lMF);
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mMFI = lMF.getInfo<AMDILMachineFunctionInfo>();
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SetupMachineFunction(lMF);
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std::string kernelName = MF->getFunction()->getName();
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mName = Strip(kernelName);
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mKernelName = kernelName;
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EmitFunctionHeader();
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EmitFunctionBody();
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return false;
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}
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void
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AMDIL7XXAsmPrinter::EmitInstruction(const MachineInstr *II)
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{
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std::string FunStr;
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raw_string_ostream OFunStr(FunStr);
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formatted_raw_ostream O(OFunStr);
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const AMDILSubtarget *curTarget = mTM->getSubtargetImpl();
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if (mDebugMode) {
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O << ";" ;
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II->print(O);
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}
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if (isMacroFunc(II)) {
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emitMacroFunc(II, O);
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O.flush();
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OutStreamer.EmitRawText(StringRef(FunStr));
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return;
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}
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if (isMacroCall(II)) {
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const char *name;
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name = mTM->getInstrInfo()->getName(II->getOpcode()) + 5;
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int macronum = amd::MacroDBFindMacro(name);
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O << "\t;"<< name<<"\n";
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O << "\tmcall("<<macronum<<")";
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if (curTarget->device()->isSupported(
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AMDILDeviceInfo::MacroDB)) {
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mMacroIDs.insert(macronum);
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} else {
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mMFI->addCalledIntr(macronum);
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}
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}
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// Print the assembly for the instruction.
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// We want to make sure that we do HW constants
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// before we do arena segment
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if (mMeta->useCompilerWrite(II)) {
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// TODO: This is a hack to get around some
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// conformance failures.
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O << "\tif_logicalz cb0[0].x\n";
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O << "\tuav_raw_store_id("
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<< curTarget->device()->getResourceID(AMDILDevice::RAW_UAV_ID)
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<< ") ";
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O << "mem0.x___, cb0[3].x, r0.0\n";
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O << "\tendif\n";
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mMFI->addMetadata(";memory:compilerwrite");
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} else {
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printInstruction(II, O);
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}
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O.flush();
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OutStreamer.EmitRawText(StringRef(FunStr));
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}
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@ -1,162 +0,0 @@
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//===-- AMDILAsmPrinterEG.cpp - TODO: Add brief description -------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//==-----------------------------------------------------------------------===//
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#include "AMDILEGAsmPrinter.h"
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#include "AMDILAlgorithms.tpp"
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#include "AMDILDevices.h"
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#include "AMDILEGAsmPrinter.h"
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#include "AMDILGlobalManager.h"
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#include "AMDILKernelManager.h"
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#include "AMDILMachineFunctionInfo.h"
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#include "AMDILUtilityFunctions.h"
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#include "llvm/ADT/SmallString.h"
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#include "llvm/ADT/Statistic.h"
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#include "llvm/ADT/StringExtras.h"
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#include "llvm/Analysis/DebugInfo.h"
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#include "llvm/CodeGen/MachineConstantPool.h"
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#include "llvm/CodeGen/MachineModuleInfo.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/Constants.h"
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#include "llvm/MC/MCAsmInfo.h"
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#include "llvm/MC/MCStreamer.h"
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#include "llvm/MC/MCSymbol.h"
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#include "llvm/Metadata.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/DebugLoc.h"
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#include "llvm/Support/InstIterator.h"
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#include "llvm/Support/TargetRegistry.h"
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#include "llvm/Type.h"
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using namespace llvm;
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// TODO: Add support for verbose.
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AMDILEGAsmPrinter::AMDILEGAsmPrinter(TargetMachine& TM, MCStreamer &Streamer)
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: AMDILAsmPrinter(TM, Streamer)
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{
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}
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AMDILEGAsmPrinter::~AMDILEGAsmPrinter()
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{
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}
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//
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// @param name
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// @brief strips KERNEL_PREFIX and KERNEL_SUFFIX from the name
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// and returns that name if both of the tokens are present.
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//
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static
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std::string Strip(const std::string &name)
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{
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size_t start = name.find("__OpenCL_");
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size_t end = name.find("_kernel");
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if (start == std::string::npos
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|| end == std::string::npos
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|| (start == end)) {
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return name;
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} else {
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return name.substr(9, name.length()-16);
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}
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}
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void
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AMDILEGAsmPrinter::emitMacroFunc(const MachineInstr *MI,
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llvm::raw_ostream &O)
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{
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const AMDILSubtarget *curTarget = mTM->getSubtargetImpl();
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const char *name = "unknown";
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llvm::StringRef nameRef;
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if (MI->getOperand(0).isGlobal()) {
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nameRef = MI->getOperand(0).getGlobal()->getName();
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name = nameRef.data();
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}
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if (!::strncmp(name, "__fma_f32", 9) && curTarget->device()->usesHardware(
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AMDILDeviceInfo::FMA)) {
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name = "__hwfma_f32";
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}
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emitMCallInst(MI, O, name);
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}
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bool
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AMDILEGAsmPrinter::runOnMachineFunction(MachineFunction &lMF)
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{
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this->MF = &lMF;
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mMeta->setMF(&lMF);
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mMFI = lMF.getInfo<AMDILMachineFunctionInfo>();
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SetupMachineFunction(lMF);
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std::string kernelName = MF->getFunction()->getName();
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mName = Strip(kernelName);
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mKernelName = kernelName;
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EmitFunctionHeader();
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EmitFunctionBody();
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return false;
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}
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void
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AMDILEGAsmPrinter::EmitInstruction(const MachineInstr *II)
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{
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std::string FunStr;
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raw_string_ostream OFunStr(FunStr);
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formatted_raw_ostream O(OFunStr);
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const AMDILSubtarget *curTarget = mTM->getSubtargetImpl();
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if (mDebugMode) {
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O << ";" ;
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II->print(O);
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}
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if (isMacroFunc(II)) {
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emitMacroFunc(II, O);
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O.flush();
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OutStreamer.EmitRawText(StringRef(FunStr));
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return;
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}
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if (isMacroCall(II)) {
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const char *name;
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name = mTM->getInstrInfo()->getName(II->getOpcode()) + 5;
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if (!::strncmp(name, "__fma_f32", 9)
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&& curTarget->device()->usesHardware(
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AMDILDeviceInfo::FMA)) {
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name = "__hwfma_f32";
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}
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//assert(0 &&
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//"Found a macro that is still in use!");
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int macronum = amd::MacroDBFindMacro(name);
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O << "\t;"<< name<<"\n";
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O << "\tmcall("<<macronum<<")";
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if (curTarget->device()->isSupported(
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AMDILDeviceInfo::MacroDB)) {
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mMacroIDs.insert(macronum);
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} else {
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mMFI->addCalledIntr(macronum);
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}
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}
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// Print the assembly for the instruction.
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// We want to make sure that we do HW constants
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// before we do arena segment
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// TODO: This is a hack to get around some
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// conformance failures.
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if (mMeta->useCompilerWrite(II)) {
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O << "\tif_logicalz cb0[0].x\n";
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if (mMFI->usesMem(AMDILDevice::RAW_UAV_ID)) {
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O << "\tuav_raw_store_id("
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<< curTarget->device()->getResourceID(AMDILDevice::RAW_UAV_ID)
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<< ") ";
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O << "mem0.x___, cb0[3].x, r0.0\n";
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} else {
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O << "\tuav_arena_store_id("
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<< curTarget->device()->getResourceID(AMDILDevice::ARENA_UAV_ID)
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<< ")_size(dword) ";
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O << "cb0[3].x, r0.0\n";
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}
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O << "\tendif\n";
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mMFI->addMetadata(";memory:compilerwrite");
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} else {
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printInstruction(II, O);
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}
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O.flush();
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OutStreamer.EmitRawText(StringRef(FunStr));
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}
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@ -19,7 +19,6 @@ GENERATED_SOURCES := \
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CPP_SOURCES := \
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AMDIL7XXDevice.cpp \
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AMDILAsmBackend.cpp \
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AMDILBarrierDetect.cpp \
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AMDILCFGStructurizer.cpp \
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AMDILDevice.cpp \
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