From 8cc80e396e0f604bdeb962fe35c32ca1e6b361f3 Mon Sep 17 00:00:00 2001 From: Ilia Mirkin Date: Sun, 29 May 2016 09:58:40 -0400 Subject: [PATCH] nvc0/ir: fix emission of predicate spill to register The lane mask only applies to real mov's, while here we're using PSET. Signed-off-by: Ilia Mirkin --- src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp index 1bb962f9e26..9159e342193 100644 --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp @@ -1981,7 +1981,8 @@ CodeEmitterNVC0::emitMOV(const Instruction *i) else opc = HEX64(28000000, 00000004); - opc |= i->lanes << 5; + if (i->src(0).getFile() != FILE_PREDICATE) + opc |= i->lanes << 5; emitForm_B(i, opc); } else {