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gallium: Drop unused X2D opcode. 

Nothing in the tree generates it.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
This commit is contained in:
Eric Anholt 2014-11-12 14:30:03 -08:00
parent ff886c4955
commit 8c822b1e91
10 changed files with 4 additions and 77 deletions
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1
src/gallium/auxiliary/gallivm/lp_bld_tgsi.c
View File

@ -211,7 +211,6 @@ lp_build_tgsi_inst_llvm(
case TGSI_OPCODE_UP2US:
case TGSI_OPCODE_UP4B:
case TGSI_OPCODE_UP4UB:
case TGSI_OPCODE_X2D:
case TGSI_OPCODE_BRA:
case TGSI_OPCODE_PUSHA:
case TGSI_OPCODE_POPA:

6
src/gallium/auxiliary/gallivm/lp_bld_tgsi_aos.c
View File

@ -792,12 +792,6 @@ lp_emit_instruction_aos(
return FALSE;
break;
case TGSI_OPCODE_X2D:
/* deprecated? */
assert(0);
return FALSE;
break;
case TGSI_OPCODE_ARR:
src0 = lp_build_emit_fetch(&bld->bld_base, inst, 0, LP_CHAN_ALL);
dst0 = lp_build_round(&bld->bld_base.base, src0);

45
src/gallium/auxiliary/tgsi/tgsi_exec.c
View File

@ -2783,47 +2783,6 @@ exec_scs(struct tgsi_exec_machine *mach,
}
}
static void
exec_x2d(struct tgsi_exec_machine *mach,
const struct tgsi_full_instruction *inst)
{
union tgsi_exec_channel r[4];
union tgsi_exec_channel d[2];
fetch_source(mach, &r[0], &inst->Src[1], TGSI_CHAN_X, TGSI_EXEC_DATA_FLOAT);
fetch_source(mach, &r[1], &inst->Src[1], TGSI_CHAN_Y, TGSI_EXEC_DATA_FLOAT);
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_XZ) {
fetch_source(mach, &r[2], &inst->Src[2], TGSI_CHAN_X, TGSI_EXEC_DATA_FLOAT);
micro_mul(&r[2], &r[2], &r[0]);
fetch_source(mach, &r[3], &inst->Src[2], TGSI_CHAN_Y, TGSI_EXEC_DATA_FLOAT);
micro_mul(&r[3], &r[3], &r[1]);
micro_add(&r[2], &r[2], &r[3]);
fetch_source(mach, &r[3], &inst->Src[0], TGSI_CHAN_X, TGSI_EXEC_DATA_FLOAT);
micro_add(&d[0], &r[2], &r[3]);
}
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_YW) {
fetch_source(mach, &r[2], &inst->Src[2], TGSI_CHAN_Z, TGSI_EXEC_DATA_FLOAT);
micro_mul(&r[2], &r[2], &r[0]);
fetch_source(mach, &r[3], &inst->Src[2], TGSI_CHAN_W, TGSI_EXEC_DATA_FLOAT);
micro_mul(&r[3], &r[3], &r[1]);
micro_add(&r[2], &r[2], &r[3]);
fetch_source(mach, &r[3], &inst->Src[0], TGSI_CHAN_Y, TGSI_EXEC_DATA_FLOAT);
micro_add(&d[1], &r[2], &r[3]);
}
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_X) {
store_dest(mach, &d[0], &inst->Dst[0], inst, TGSI_CHAN_X, TGSI_EXEC_DATA_FLOAT);
}
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Y) {
store_dest(mach, &d[1], &inst->Dst[0], inst, TGSI_CHAN_Y, TGSI_EXEC_DATA_FLOAT);
}
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Z) {
store_dest(mach, &d[0], &inst->Dst[0], inst, TGSI_CHAN_Z, TGSI_EXEC_DATA_FLOAT);
}
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_W) {
store_dest(mach, &d[1], &inst->Dst[0], inst, TGSI_CHAN_W, TGSI_EXEC_DATA_FLOAT);
}
}
static void
exec_rfl(struct tgsi_exec_machine *mach,
const struct tgsi_full_instruction *inst)
@ -3908,10 +3867,6 @@ exec_instruction(
assert (0);
break;
case TGSI_OPCODE_X2D:
exec_x2d(mach, inst);
break;
case TGSI_OPCODE_ARR:
exec_vector_unary(mach, inst, micro_arr, TGSI_EXEC_DATA_INT, TGSI_EXEC_DATA_FLOAT);
break;

2
src/gallium/auxiliary/tgsi/tgsi_info.c
View File

@ -96,7 +96,7 @@ static const struct tgsi_opcode_info opcode_info[TGSI_OPCODE_LAST] =
{ 1, 1, 0, 0, 0, 0, COMP, "UP2US", TGSI_OPCODE_UP2US },
{ 1, 1, 0, 0, 0, 0, COMP, "UP4B", TGSI_OPCODE_UP4B },
{ 1, 1, 0, 0, 0, 0, COMP, "UP4UB", TGSI_OPCODE_UP4UB },
{ 1, 3, 0, 0, 0, 0, COMP, "X2D", TGSI_OPCODE_X2D },
{ 0, 1, 0, 0, 0, 1, NONE, "", 59 }, /* removed */
{ 0, 1, 0, 0, 0, 1, NONE, "", 60 }, /* removed */
{ 1, 1, 0, 0, 0, 0, COMP, "ARR", TGSI_OPCODE_ARR },
{ 0, 1, 0, 0, 0, 0, NONE, "BRA", TGSI_OPCODE_BRA },

1
src/gallium/auxiliary/tgsi/tgsi_opcode_tmp.h
View File

@ -111,7 +111,6 @@ OP11(UP2H)
OP11(UP2US)
OP11(UP4B)
OP11(UP4UB)
OP13(X2D)
OP11(ARR)
OP01(BRA)
OP00_LBL(CAL)

16
src/gallium/docs/source/tgsi.rst
View File

@ -684,22 +684,6 @@ This instruction replicates its result.
Considered for removal.
.. opcode:: X2D - 2D Coordinate Transformation
.. math::
dst.x = src0.x + src1.x \times src2.x + src1.y \times src2.y
dst.y = src0.y + src1.x \times src2.z + src1.y \times src2.w
dst.z = src0.x + src1.x \times src2.x + src1.y \times src2.y
dst.w = src0.y + src1.x \times src2.z + src1.y \times src2.w
.. note::
Considered for removal.
.. opcode:: ARR - Address Register Load With Round

2
src/gallium/drivers/ilo/shader/toy_tgsi.c
View File

@ -853,7 +853,6 @@ static const toy_tgsi_translate aos_translate_table[TGSI_OPCODE_LAST] = {
[TGSI_OPCODE_UP2US] = aos_unsupported,
[TGSI_OPCODE_UP4B] = aos_unsupported,
[TGSI_OPCODE_UP4UB] = aos_unsupported,
[TGSI_OPCODE_X2D] = aos_unsupported,
[TGSI_OPCODE_ARR] = aos_simple,
[TGSI_OPCODE_BRA] = aos_unsupported,
[TGSI_OPCODE_CAL] = aos_unsupported,
@ -1402,7 +1401,6 @@ static const toy_tgsi_translate soa_translate_table[TGSI_OPCODE_LAST] = {
[TGSI_OPCODE_UP2US] = soa_unsupported,
[TGSI_OPCODE_UP4B] = soa_unsupported,
[TGSI_OPCODE_UP4UB] = soa_unsupported,
[TGSI_OPCODE_X2D] = soa_unsupported,
[TGSI_OPCODE_ARR] = soa_per_channel,
[TGSI_OPCODE_BRA] = soa_unsupported,
[TGSI_OPCODE_CAL] = soa_unsupported,

1
src/gallium/drivers/r300/r300_tgsi_to_rc.c
View File

@ -86,7 +86,6 @@ static unsigned translate_opcode(unsigned opcode)
/* case TGSI_OPCODE_UP2US: return RC_OPCODE_UP2US; */
/* case TGSI_OPCODE_UP4B: return RC_OPCODE_UP4B; */
/* case TGSI_OPCODE_UP4UB: return RC_OPCODE_UP4UB; */
/* case TGSI_OPCODE_X2D: return RC_OPCODE_X2D; */
/* case TGSI_OPCODE_ARR: return RC_OPCODE_ARR; */
/* case TGSI_OPCODE_BRA: return RC_OPCODE_BRA; */
/* case TGSI_OPCODE_CAL: return RC_OPCODE_CAL; */

6
src/gallium/drivers/r600/r600_shader.c
View File

@ -7247,7 +7247,7 @@ static struct r600_shader_tgsi_instruction r600_shader_tgsi_instruction[] = {
{TGSI_OPCODE_UP2US, 0, ALU_OP0_NOP, tgsi_unsupported},
{TGSI_OPCODE_UP4B, 0, ALU_OP0_NOP, tgsi_unsupported},
{TGSI_OPCODE_UP4UB, 0, ALU_OP0_NOP, tgsi_unsupported},
{TGSI_OPCODE_X2D, 0, ALU_OP0_NOP, tgsi_unsupported},
{59, 0, ALU_OP0_NOP, tgsi_unsupported},
{60, 0, ALU_OP0_NOP, tgsi_unsupported},
{TGSI_OPCODE_ARR, 0, ALU_OP0_NOP, tgsi_r600_arl},
{TGSI_OPCODE_BRA, 0, ALU_OP0_NOP, tgsi_unsupported},
@ -7446,7 +7446,7 @@ static struct r600_shader_tgsi_instruction eg_shader_tgsi_instruction[] = {
{TGSI_OPCODE_UP2US, 0, ALU_OP0_NOP, tgsi_unsupported},
{TGSI_OPCODE_UP4B, 0, ALU_OP0_NOP, tgsi_unsupported},
{TGSI_OPCODE_UP4UB, 0, ALU_OP0_NOP, tgsi_unsupported},
{TGSI_OPCODE_X2D, 0, ALU_OP0_NOP, tgsi_unsupported},
{59, 0, ALU_OP0_NOP, tgsi_unsupported},
{60, 0, ALU_OP0_NOP, tgsi_unsupported},
{TGSI_OPCODE_ARR, 0, ALU_OP0_NOP, tgsi_eg_arl},
{TGSI_OPCODE_BRA, 0, ALU_OP0_NOP, tgsi_unsupported},
@ -7645,7 +7645,7 @@ static struct r600_shader_tgsi_instruction cm_shader_tgsi_instruction[] = {
{TGSI_OPCODE_UP2US, 0, ALU_OP0_NOP, tgsi_unsupported},
{TGSI_OPCODE_UP4B, 0, ALU_OP0_NOP, tgsi_unsupported},
{TGSI_OPCODE_UP4UB, 0, ALU_OP0_NOP, tgsi_unsupported},
{TGSI_OPCODE_X2D, 0, ALU_OP0_NOP, tgsi_unsupported},
{59, 0, ALU_OP0_NOP, tgsi_unsupported},
{60, 0, ALU_OP0_NOP, tgsi_unsupported},
{TGSI_OPCODE_ARR, 0, ALU_OP0_NOP, tgsi_eg_arl},
{TGSI_OPCODE_BRA, 0, ALU_OP0_NOP, tgsi_unsupported},

1
src/gallium/include/pipe/p_shader_tokens.h
View File

@ -342,7 +342,6 @@ struct tgsi_property_data {
#define TGSI_OPCODE_UP2US 56
#define TGSI_OPCODE_UP4B 57
#define TGSI_OPCODE_UP4UB 58
#define TGSI_OPCODE_X2D 59
/* gap */
#define TGSI_OPCODE_ARR 61
#define TGSI_OPCODE_BRA 62