From 8c796169845a60a9e3752ebddd122c09e0715b91 Mon Sep 17 00:00:00 2001 From: Timothy Arceri Date: Fri, 6 May 2022 12:09:09 +1000 Subject: [PATCH] svga: disable GLSL IR loop unrolling NIR loop unrolling is already enabled so just let it do its job. Here we also fix up the force unroll settings. Reviewed-by: Emma Anholt Part-of: --- src/gallium/drivers/svga/svga_screen.c | 27 +++++++++++++++++--------- 1 file changed, 18 insertions(+), 9 deletions(-) diff --git a/src/gallium/drivers/svga/svga_screen.c b/src/gallium/drivers/svga/svga_screen.c index 5e880020666..67ae0543612 100644 --- a/src/gallium/drivers/svga/svga_screen.c +++ b/src/gallium/drivers/svga/svga_screen.c @@ -554,9 +554,8 @@ vgpu9_get_shader_param(struct pipe_screen *screen, case PIPE_SHADER_CAP_MAX_SHADER_IMAGES: case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS: case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS: - return 0; case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT: - return 32; + return 0; } /* If we get here, we failed to handle a cap above */ debug_printf("Unexpected fragment shader query %u\n", param); @@ -622,9 +621,8 @@ vgpu9_get_shader_param(struct pipe_screen *screen, case PIPE_SHADER_CAP_MAX_SHADER_IMAGES: case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS: case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS: - return 0; case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT: - return 32; + return 0; } /* If we get here, we failed to handle a cap above */ debug_printf("Unexpected vertex shader query %u\n", param); @@ -745,11 +743,10 @@ vgpu10_get_shader_param(struct pipe_screen *screen, case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS: return sws->have_gl43 ? SVGA_MAX_ATOMIC_BUFFERS : 0; + case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT: case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE: case PIPE_SHADER_CAP_INT64_ATOMICS: return 0; - case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT: - return 32; default: debug_printf("Unexpected vgpu10 shader query %u\n", param); return 0; @@ -776,9 +773,17 @@ vgpu10_get_shader_param(struct pipe_screen *screen, .lower_fmod = true, \ .lower_fpow = true -static const nir_shader_compiler_options svga_vgpu9_compiler_options = { +static const nir_shader_compiler_options svga_vgpu9_fragment_compiler_options = { COMMON_OPTIONS, .lower_bitops = true, + .force_indirect_unrolling = nir_var_all, + .force_indirect_unrolling_sampler = true, +}; + +static const nir_shader_compiler_options svga_vgpu9_vertex_compiler_options = { + COMMON_OPTIONS, + .lower_bitops = true, + .force_indirect_unrolling = nir_var_function_temp, .force_indirect_unrolling_sampler = true, }; @@ -807,8 +812,12 @@ svga_get_compiler_options(struct pipe_screen *pscreen, return &svga_gl4_compiler_options; else if (sws->have_vgpu10) return &svga_vgpu10_compiler_options; - else - return &svga_vgpu9_compiler_options; + else { + if (shader == PIPE_SHADER_FRAGMENT) + return &svga_vgpu9_fragment_compiler_options; + else + return &svga_vgpu9_vertex_compiler_options; + } } static int